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libflashrom.so.1.0.0
ELF > @ p @ 8 @ a a P- P- P P P Ћ إ x x x @ @ $ $ Std Ptd Dl Dl Dl Qtd Rtd P P P GNU GNU dJqa } % R*#H!N`DL CV! \/>gï('IOtɩï"; tq 93OW QC{Ze?`jDfx$qz,^"+'d-@}xMRwm(=`FcaigZ}TI@`S2u/ K < y l a i i I o s @ a d < U 4 < i 5 w p A F # _ ! 4 ? 4 w L Z > v N ' * & Z & C L , * , c 6 X : 6 ( G 1 a , } c 8 F " M f @ p ( X U w p = ` ` ; 9 0@ a @ . @ , n p 9 @ t @? ^ A ` P ? d 1 P 4 D ` ; \ Y Z ] 3 __gmon_start__ _ITM_deregisterTMCloneTable _ITM_registerTMCloneTable __cxa_finalize __stack_chk_fail __ctype_b_loc flashrom_layout_include_region strcmp flashrom_layout_get_region_range flashrom_layout_release flashrom_shutdown flashrom_set_log_callback memcpy __memcpy_chk calloc malloc memcmp __memset_chk memset strlen realloc __strcat_chk flashrom_layout_new __errno_location strerror flashrom_layout_add_region strdup flashrom_init gettimeofday flashrom_version_info flashrom_supported_flash_chips flashrom_supported_boards flashrom_supported_chipsets flashrom_data_free flashrom_programmer_init flashrom_programmer_shutdown flashrom_flash_getsize flashrom_flash_release flashrom_flash_probe flashrom_flag_set flashrom_flag_get flashrom_layout_read_fmap_from_buffer flashrom_layout_set flashrom_wp_cfg_new flashrom_wp_cfg_release flashrom_wp_set_mode flashrom_wp_get_mode flashrom_wp_set_range flashrom_wp_get_range flashrom_wp_write_cfg flashrom_wp_read_cfg flashrom_wp_get_available_ranges flashrom_wp_ranges_get_count flashrom_wp_ranges_get_range flashrom_wp_ranges_release flashrom_flash_erase flashrom_image_read flashrom_image_write strcasecmp flashrom_image_verify flashrom_layout_read_from_ifd flashrom_layout_read_fmap_from_rom getpagesize munmap iopl pci_cleanup pci_write_byte pci_write_word pci_write_long tcgetattr tcsetattr cfgetispeed cfgetospeed cfsetispeed cfsetospeed ioctl libusb_error_name libusb_handle_events_timeout libusb_cancel_transfer libusb_submit_transfer libusb_free_transfer libusb_release_interface libusb_attach_kernel_driver libusb_close libusb_exit libusb_control_transfer libusb_bulk_transfer libusb_init libusb_set_option libusb_open_device_with_vid_pid libusb_detach_kernel_driver libusb_claim_interface libusb_get_device libusb_get_device_descriptor libusb_alloc_transfer clock_gettime clock_getres nanosleep pci_read_byte pci_read_long mmap64 lseek64 pci_read_word pci_filter_init pci_filter_match pci_fill_info pci_alloc pci_init pci_scan_bus pci_filter_parse_slot strtoul fcntl64 memmove strncasecmp strchr __snprintf_chk __isoc99_sscanf libusb_set_configuration strtol strspn __ctype_tolower_loc strncmp libusb_get_string_descriptor_ascii fopen64 fwrite fflush fclose strstr stdin fileno fdopen fstat64 fread ftdi_write_data ftdi_usb_close ftdi_get_error_string ftdi_read_data __ctype_toupper_loc ftdi_init ftdi_set_interface ftdi_usb_open_desc ftdi_usb_reset ftdi_set_latency_timer ftdi_set_bitmode pci_get_dev libusb_get_device_list libusb_free_device_list libusb_get_device_address libusb_get_bus_number libusb_open strtoull clearerr feof ferror fseek setvbuf fgets strtok strnlen libusb_interrupt_transfer libusb_unref_device libusb_free_config_descriptor ftdi_usb_open ftdi_write_data_set_chunksize ftdi_read_data_set_chunksize strcspn __strncpy_chk libusb_get_config_descriptor libusb_ref_device libusb_get_configuration libusb_set_auto_detach_kernel_driver libusb_set_interface_alt_setting usleep __assert_fail socket gethostbyname connect setsockopt tcflush stdout gethostbyaddr pci_free_dev qsort snprintf libpci.so.3 libusb-1.0.so.0 libftdi1.so.2 libc.so.6 libflashrom.so.1 LIBFLASHROM_1.0 LIBPCI_3.5 LIBPCI_3.8 LIBPCI_3.0 GLIBC_2.28 GLIBC_2.7 GLIBC_2.14 GLIBC_2.33 GLIBC_2.4 GLIBC_2.17 GLIBC_2.2.5 GLIBC_2.3.4 GLIBC_2.3 2 , = @ e)| M h)| X `)| c " n ii y ii ui ti ii P @3 X 3 h p % ( 6 0 ? h V p h o y ( 0 h p ؆ 8 p ( ؇ 8 @ P X H h p x Ȉ ( H ( p 8 @ P X h p H P ( 0 x @ H X ` ؋ p x H x Ȉ ( H P @ ` h p ( 0 @ H # X ` + p x 2 : ? : Z c k s { 0 8 H P ، ` h x ( 0 h p H 8 p ( S 0 ^ h w p ~ w w w w w w w ( w 0 @ w H X w ` p w x w w w w # w 4 w A w P 0 w 8 \ H w P \ ` w h j x w ~ ( 8 @ P X ( h p X " 0 ` 8 ` 0 p x 0 = 0 J ` Q X U 0 8 pY ` a p x `C p z ` 0 8 ` p ` x W 0 @ 8 ` p ؎ x _ x 8 0 8 P ` p 0 x % X z P- - P 8 0 8 @ ` ? p x 0 F ` N W 0 8 pd ` h p ` x r } @ 0 8 p x $ N N ( 8 @ H ( ` h p 0 * * N N ( 0 8 : P X ` x p # p ( @ H P h p x % 3 0 8 @ X ` h " & * . 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Ё : O e { 0 8 H P ` h x Ȃ 5 M a ( k 8 @ z P X h p ȃ Ѓ ( 0 @ H X ` X p x 0 Є ; x F W v p4 d v b v j 0 v 8 H ' ` n v ' І v ؆ g v ( 8 @6 p v x @6 v ȇ ؇ `4 v ( `4 ` v h x 4 v Ȉ 05 v h 8 v @ P v X h h g ؉ T Z 1 @ ` H i X x P) Ȋ Њ P) 0 8 H g p6 Ћ ؋ g ( 8 i P p x i Ȍ ، @6 # 0 ( i @ = ` h x F ȍ 8 g P X h g M n t M t @ M H X M M h 0 M 8 H h M t А M ؐ P % X M ( ] 8 pg P b p M x P4 j M ȑ ؑ P4 M ( 2 @ s ` M h x g M Ȓ P4 M ] `2 0 } P M X h g M m 0' Г M 0' ( 0 @ M H X $ M 6 M 6 0 M 8 H 6 ` M 6 Е M ؕ 6 M ( 8 6 P p M x 6 M Ȗ ؖ 6 M ( 6 @ ` M h x 6 M ȗ 6 M 6 P M X = h g M , И ؘ M E @ M H f X p6 p M z 6 M 6 0 M 8 H 6 ` M 6 К M ؚ 6 ) M ( 8 6 P 3 p M x 6 M ț ؛ 6 ; M N ( pg @ E ` M h e x pg O M * Ȝ @6 W M 0 @6 0 b P M X 9 h @6 m M B @6 M @5 { @ M H X t p M t M 6 0 M 8 H @6 ` M 6 П M ؟ 6 M ( 8 i p x Ƞ ؠ ( i ` h $ x ( 1 ȡ g [ P ~ X h i ~ @% ~ @ } H X p } 4 } 4 0 } 8 H 5 h p } `' Ф ؤ p4 " $ ( ) 8 i P 7 p k x g k ȥ > k ( g ` k h x g k Ȧ g J k ) ps 0 Y P k X 8 h ps k 5 k 5 @ k H X 4 k `5 K h h e h 0 K 8 H h e p q K Щ K ة P6 K ( 8 Ph P z p K x 6 e K Ȫ ت 4 4 7 ( g ` = h A x P V ȫ { v i 0 P X h ' 1 Ь " ( 0 @ ) H 1 X h p i i 0 8 H i ` i Ю خ i ( % 8 i P 5 p x 6 i D ȯ E د i S T ( i H b P i ` h n x i | } Ȱ i i 0 8 @ P X E h i a g t б n r i @ z H X @' z g z 0 z 8 H 1 z 2 г z س 2 z ( M 8 2 X ` p z x \ z ȴ ش g z v ( ps ` z h x 5 z ȵ 5 z `6 P z X h z p4 ض z @2 @ z H 5 X p4 z ) p4 p ; 0 K 8 X H i ` f h l p q l x i и c ظ k 6 } ( 8 p x ȹ ع h ( 5 ` X h _ h p Ⱥ ` 6 P X h p2 k 2 @ H X p2 ȼ 0 ` ` 0 8 ` п ` @ ` ` ` ` ` h ` @ ` p @ H ` ` P ( ` ` 0 p ` p x , ` 8 P ` P X D ` P 0 ` ` 0 8 \ ` g ` @ r w 9 ^ r P H 9 P ^ r ` 9 ^ ` r h 0 ` p ( ? 0 _ r @ p 9 ^ @ r H 08 ^ r P x 08 ^ r ( 9 ^ r 0 X 08 ` ^ r p 08 ^ p r x p @ 8 9 @ ^ r P p 9 ^ P r X 08 ^ r 0 ` 08 ^ 0 r 8 9 ^ r @ h 9 p ^ r 9 ^ r H 9 P ^ r ` p ? _ ` r h # 0 ` p ( ? 0 _ r + @ p p ; _ @ r H 3 ` r ; ! ` P! # r (# C # ` # % r % K & 0& `' ( U ( [ p( ( ( ) p 0) ) A ) `_ p* U x* e * + @+ p+ p + 8, A @, `_ , U , p P- - - - p . . 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PB ? _ `@ U h@ @ A 0A `A p A (B PB 0B _ B U B @C pC C C p D D PB D _ @E U HE E E G B G _ G U G H PH xI B I _ J U (J J J K PG K _ L U L M 0M XN B `N _ O U O pO O P 0D P _ pQ U xQ Q R @R pR p R R 8S E @S ` S U S PT T P T T U p @U U H U 0` PV U XV " V V W PW p W X J X P` X U X , 0Y `Y Y Y p Y Z 0 Z ^ 0[ U 8[ 6 [ [ \ 0\ p `\ \ 0 ] ^ ] U ] @ ^ @^ p^ ^ p ^ h_ < p_ @_ ` U ` K ` ` ` a p @a a 0 a ^ b U b U b c Pc c p c Hd 0 Pd ^ d U d _ `e e e e p f f 0 f ^ `g U hg j g h 0h (i 0 i U i t @j pj j j p k k K k `_ @l U Hl l l m @m p pm n A n `_ n U n o Po o o p o xp K p `_ q U (q q q q r p Pr r 0 s U s t v U v pv px U xx x z U z P{ P} U X} } T 0 U 0 R ` pS Q 0T K pJ 0 U 8 R Ђ pS Q 0 0T K pJ U R @ pS p Q 0T h K p pJ U R pS Q 0T ؈ K pJ U R pS P Q 0T H K P pJ U ` R pS 0T K ` U h Ў R pS 0 Q ` 0T ( K 0 pJ А U ؐ @ R p pS Q Б 0T K pJ @ U H R pS Q @ 0T K pJ U & x pq U ( 2 U < ` 0 U H p ` p U x U 8 pq U ^ P pq P U X g pq U Ȧ p 0 pq 0 U 8 z Щ B U B h p U B د P p H 9 P _ ` p 0 P` ` h е ` з ط @ H `] P x 9 _ ( 9 _ 0 X 9 ` _ p p 0 ^ p x $ @ p p 8 = @ ^ - P ` P 7 X ; 0 ^ 7 C 0 ` 0 ^ 0 7 8 L 0 ^ 7 T @ h 0 p ^ 7 ] 0 ^ 7 e H 0 P ^ 7 n ` 0 ^ ` 7 h v ( 0 0 ^ 7 @ p 0 ^ @ 7 H 0 ^ 7 P x 0 ^ 7 ( 0 ^ 7 0 X 0 ` ^ 7 p 0 ^ p 7 x 8 0 @ ^ 7 P 0 ^ P 7 X P p 0 ^ 7 0 ` p 0 ^ 0 7 8 p 0 0 ^ 7 @ p p h 0 p ^ 7 p 0 ^ 7 P p H 0 P ^ 7 ` p 0 ^ ` 7 h 0 p ` ( 0 0 ^ 7 @ p 0 ^ @ 7 H 0 ^ 7 P x 0 ^ 7 ( 0 ^ 7 # 0 X 0 ` ^ 7 + p 0 ^ p 7 x 3 8 0 @ ^ 7 ; P 0 ^ P 7 X C p P 0 ^ 7 L 0 ` p 0 ^ 0 7 8 T p 0 0 ^ 7 a ! @! p! p ! h" 0 p" ^ # 7 # i # # # p $ $ 0 $ ^ % 7 % q % & P& p & H' 0 P' ^ ' 7 ' | `( ( ( p ( ) ; ) _ `* 7 h* * + 0+ p `+ (, ; 0, _ , 7 , @- p- - p - . ; . _ @/ 7 H/ / / 0 p @0 1 ; 1 _ 1 7 1 2 P2 2 p 2 x3 9 3 ^ 4 7 (4 4 4 4 5 p P5 5 `L 5 _ 6 7 6 7 07 `7 p 7 X8 9 `8 ^ 9 7 9 p9 9 9 : p 0: : `L : _ p; 7 x; ; < @< p p< 8= 9 @= ^ = 7 = P> > > p > ? `L ? _ P@ 7 X@ @ @ A p PA B 9 B ^ B 7 B 0C ` `C 0E 7 8E E ` E G 7 G H ` @H J 7 J J ` J L 7 L L ` M N 7 N `O ` O `Q 7 hQ + Q ` R S 7 S 5 @T ` pT @V 7 HV B V V X M X S Y PY Y Y p Y xZ `> Z _ [ M ([ \ [ [ [ \ p P\ \ `> \ _ ] M ] d ^ 0^ `^ ^ p ^ X_ `> `_ _ ` M ` o p` ` ` a p 0a a `> a _ pb M xb z b c @c pc p c 8d `> @d _ d M d Pe e e e p f f `> f _ Pg M Xg g g h Ph p h i `> i _ i $ i 0j ` `j 0l $ 8l l ` l n $ n o ` @o q $ q q ` q s $ s s t u $ u `v v `x hx x y 0y `y p y (z < 0z @_ z z @{ p{ { { p | | < | @_ @} H} } } ~ @~ p p~ < @_ P p x < @_ ( p P < @_ 0 ` p X < ` @_ " p Ї p 0 Ȉ < Ј @_ p x + @ p p 8 < @ @_ 3 P p < @_ P X G P p < @_ Ȑ R 0 ` p < @_ 0 8 ] @ Г 0 ` p ; ^ q @ p p Ж h < p @_ | p @ ؙ < @_ P p H < P @_ ` p < @_ ` h П 0 ` p ( < 0 @_ С ء @ p Т p 0 ^ @ H @ p p < @_ P p x < @_ ( p P < @_ 0 ` p X < ` @_ p Ю p 0 ȯ < Я @_ p x @ p p 8 < @ @_ P ` P X ` ȷ 0 ` ` 0 8 к P 0 ` p ^ @ P p н p p ^ ) @ @ p p ^ 3 P P p P ^ = ` P p P ^ ` h G P 0 ` p 0 ^ Q @ @ p 0 ` p ^ @ H [ ` f ` P ( s ` ~ ` 0 p O ` p x 8 O @ ` P O ` P X O ` 0 ` O ` 0 8 O ` B B B ` B ` h B + @ B E @ H : B N B ( b B l B ` t } p t x t P t X t 0 ` p 08 ^ 0 t 8 p 0 ; _ t Ȑ @ p p h ; p _ t p 9 ^ t P p H ; P _ t 0 ` p ; _ ` t h 0 p ` ( ; 0 _ t @ p p ; _ @ t H @ p p 08 ^ t @ P @ p p x ; _ t ( p 9 ^ t ' ! 0! `! p ! X" ; `" _ # t # = p# # # $ p 0$ $ ; $ _ p% t x% S % & @& p p& 8' ; @' _ ' t ' ^ P( ( ( ( p ) ) ; ) _ P* t X* t * * + P+ p + , 9 , ^ , t , 0- `- - - p - . 08 . ^ 0/ t 8/ / / 0 00 p `0 0 08 1 ^ 1 t 1 2 @2 p2 p 2 h3 ; p3 _ 4 t 4 4 4 4 p 5 5 ; 5 _ 6 t 6 6 7 P7 7 p 7 H8 ; P8 _ 8 t 8 X `9 9 9 9 p : : ; : _ `; t h; ; < 0< `< p < 0= ^ = t = @> p> > > p ? ? 9 ? ^ @@ t H@ @ @ A @A p pA B ; B _ B t B C PC C C p C xD ; D _ E t (E E E E F p PF F ; F _ G t G H 0H `H H p H XI ; `I _ J t J pJ @ J J K 0K `K K p K K ; K _ pL t xL L M @M pM p M 8N ; @N _ N t N - PO @ O O O P @P pP p P P ; P _ PQ t XQ 9 Q Q R PR p R S ; S _ S t S F 0T `T T T p T U ; U _ 0V t 8V Q V ` V X t X [ Y ` @Y [ t [ e [ ` [ ] t ] r ] ` ^ _ t _ `` ` ` `b t hb b ` c d t d @e ` pe @g t Hg g ` g i t i j ` Pj l t (l l ` l n t n o ` 0o q t q pq ` q ps t xs s ` t u t u Pv ` v Px t Xx x ` x z t z 0{ @ `{ { { { | P| p | | ; | _ 0} t 8} } @ } ~ 0~ `~ ~ ~ p ~ ~ ; _ & 8 @ h ; p _ & ? ; _ & H H ; P _ & O ` ; _ ` & h X Љ ( ; 0 _ Ћ & ؋ ` @ p ; _ @ & H g 08 ^ & n P x 08 ^ & ( y ; _ & 0 X ; ` _ & p ș ; Й _ p & x 8 ; @ _ & P ; _ P & X 0 ^ & ȡ 0 ` 0 ^ 0 & 8 Ф 0 ^ & @ p h 0 p ^ & ت 0 ^ & P H 9 P _ & ` 9 _ ` & h а 0 ( 9 0 _ в & ز @ p 9 _ @ & H & P x & ( & 0 X & p p & x @ @ p 8 M @ p` & P @ M p` P & X ( P M p` & 0 0 ` M p` 0 & 8 < M p` & H @ p h M p p` & T M p` & ` P H M P p` & l ` M p` ` & h x @ 0 ` ( M 0 p` & @ @ p M p` @ & H @ @ p M p` & @ P x M p` ( @ P M p` @ 0 ` X M ` p` p @ 0 ` M p` p x @ @ p 8 M @ p` P p M p` P X P p M p` 0 @ ` P p M p` 0 8 @ 0 ` p M p` @ @ p 0 ` p h M p p` @ @ p p M p` ` ` ` ` h ) ` 4 @ ` p @ H ? ` J ` P ( U ` ` 0 P ` p X ; ` _ ` p p ; _ p ` x P @ p p 8 ; @ _ ` P P p @ ; _ P ` X P p ; _ k o 0 ` P p 9 ^ 0 k 8 | P 0 p ` 9 ^ k @ P p p h 9 p ^ k P p @ 9 ^ k ! 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H" 9 P" ^ " k " `# # P # # p $ $ ; $ _ `% k h% % & P 0& `& p & (' ; 0' _ ' k ' @( p( P ( ( p ) ) ; ) _ @* k H* * * P + @+ p p+ , ; , _ , k , - P- P - - p - x. ; . _ / k (/ / P / / 0 08 0 ^ 1 k 1 2 P 02 `2 X3 08 `3 ^ 4 k 4 p4 P 4 4 5 p 05 5 9 5 ^ p6 k x6 6 P 7 @7 88 9 @8 ^ 8 k 8 P9 P 9 9 : 9 : ^ P; k X; ; P ; < P< p < = 9 = ^ = k = 0> P `> > ? 08 ? ^ 0@ k 8@ - @ ` @ B k B 7 C ` @C E k E A E ` E E G k G K G ` H PH I k I U `J ` J J `L k hL _ L ` M 0M N k N i @O ` pO O P @Q k HQ s Q ` Q R S S } S T PT T p xU U ^ V } (V V V V p W W ^ X } X Y 0Y `Y p XZ `Z ^ [ } [ p[ [ [ \ p 0\ \ \ ^ p] } x] ] ^ @^ p^ p ^ 8_ 0 @_ ^ _ } _ P` ` ` p a a ^ Pb } Xb b b c Pc p c d d ^ d } d 0e `e e e p e f f ^ 0g } 8g g g h p h i ^ i } i j @j pj j p j hk pk ^ l } l l l l m p @m m m ^ n } n n o Po o p o Hp Pp ^ p } p `q q q q p r r r ^ `s } hs $ s t 0t `t p t (u 0u ^ u } u 2 @v pv v p v w w _ @x } Hx = x x y @y p py z z _ z } z H { P{ { p { x| `> | _ } } (} T } } } ~ p P~ ~ ~ _ } _ 0 ` p X `> ` _ } k p Ђ p 0 ȃ Ѓ _ p } x v @ p p 8 `> @ _ } P p _ P } X 0 ` } ȋ 0 ` 0 ` 0 } 8 Ў 0 ` } @ ` p 0 } } } ` ` } h К М } @ ` p @ } H ` } ` P } ( ` } ! ` 0 } , p ` p } x 7 ` } B P ` P } X M ` } Ȳ X 0 ` ` P 0 } 8 f ` е P } t ` @ h P p } B ػ p } ` H P P } ` B p ` } h B ( 0 p } @ ` p @ } H ` } ` P } ( ` } ` 0 } p B p p 5 x ` 5 P ` P 5 X ` 5 0 ` ` 0 5 8 ` 5 * ` @ 5 3 ` 5 < 5 E ` pa B ` 5 h P pa B 0 5 [ @ pa p B @ 5 H f pa B 5 q B x 5 ( z B 5 B ` 5 p B p 5 x B @ 5 P B P 5 X 08 ^ 0 ` 08 ^ 0 8 P 08 ^ @ P p p h 9 p ^ P 9 ^ P P p H 9 P _ ` P 08 ^ ` h 0 ( @ p @ H P 0 ^ " P P x 9 ^ ( - P 9 ^ 7 P 0 ` X 9 ` ^ A G p B G p A x Y B @" " b " k P# # $ 0 $ ^ P% b X% u % % ' 0 ' ^ ' b ' 0( `( ) 0 ) ^ 0* b 8* * * + 0 , ^ , b , - @- h. 0 p. ^ / b / / / / p 0 0 ; 0 _ 1 b 1 1 2 p P2 H3 9 P3 _ 3 b 3 `4 4 p 4 5 9 5 _ `6 b h6 6 7 07 `7 p 7 (8 9 08 _ 8 b 8 @9 p9 9 p 9 : ; : _ @; b H; ; ; = 9 = _ = b = > P> p > x? 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UIHAWAVHU(HM,AUATE1SHhH}L/HudH%( HE1I 8u pX HH H9uA< tAD AH tAP A\ uAT D 0 E1LxHcIH證HLxHHEH8 Lx @ 1HuMt D HIH I9uK oEoM HHAl K8 H}1H{ Hs(HHU1 H5a 踜} } } HE E1L-Z Ht/ L)L IL'HP1aHE I9rHK(HS 1H5ڮ I9HxHI9 HEH8HEL( UH5̬ 1Z @ UH5 1ٛ0 @ UH5| 1蹛 @ { HUdH+%( Hh[A\A]A^A_]JTIIHEH8H ug0 HLMLMI HtuHE111L L HHIHHoHH0LoZXob ` I;1s%I8HZ H9X uHZ(H9X(uHH0I;1rI 1#HEJDI3HEJDIHEJDIff. ULcHq MMip HAWAVN<AUATISHHMwM DEL- D H5 H Lx A$A#G IEG 1LH5Ǫ A@t AG@IcD L> L51ip HH N HLHLc(H u&HAփuHűB - w1HH;!H Mx Ip MHH H{8~ HL- H{81L@ P H{8La H DpIA4 A A AJ DAX p EuLH5 IL豂LAD 裂LHp׆H Hw IHH5: HDH L@AU1LހA$ZY c H H50 H1ۗHH HtHHH MI)IAioHe[A\A]A^A_] L5 @ L5 @ L5 @ L5" @ L5 @ L5) t @ L5d @ L5 T @ L5D @ L54 @ L5$ @ L59 @ L5)# @ L5i @ L5 @ L5 @ AGA#$6uA<i H5 1SLH5a oDAItLH5, UNUIŅLH5) 1IHI9$ HK 1H5 ȕLH5Ц I H5 HIHI9D$tH5} HI= 9 1H5J MHՑu6H5 0H5i 1 HdH5Ԩ 11H5z 莅ff. UHAWAVAUATSHXH}dH%( HE1HtH}HEulf{6 Ls@E1LeL-hx C6AI*A9}gLL! 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UHAUATSH HHHà L- IEe A D% |HH L(H=e@ AE FGH 0 Ee ^ tLH1H5 1[1A\A]]t eHH5ա 1[A\A]]鳎 H[A\A]] D DH5 1芎L- D% I* HH tu u u@uPu0u$~D~$~$~$~$~<~~~~~~~\~\~~~x~x~x~H~H~H~H~H~H~H~H~H~`~`~`~`~~~~~~`~~YԹyhԸRLl, default_spi_write_aai spi_block_erase_c7 spi_block_erase_62 spi_block_erase_60 spi_write_cmd spi_write_extended_address_register spi_simple_write_cmd probe_spi_at25f probe_spi_res2 probe_spi_res1 spi_sfdp_read_sfdp_chunk s25fl_block_erase s25fs_block_erase_d8 s25fs_software_reset register_par_master register_opaque_master unknown probe_jedec_common erase_chip_block_jedec getaddrmask probe_jedec_29gl toggle_ready_jedec_common layout_from_ich_descriptors need_erase get_next_write verify_range master_unmap_flash_region master_map_flash_region probe_en29lv640b edi_chip_probe edi_probe_kb9012 edi_shutdown edi_chip_read edi_chip_write edi_chip_block_erase edi_read at45db_fill_buffer1 at45db_commit_buffer1 at45db_program_page spi_write_at45db spi_erase_at45cs_sector spi_erase_at45db_chip spi_erase_at45db_sector spi_erase_at45db_block spi_erase_at45db_page at45db_erase spi_read_at45db_e8 spi_read_at45db at45db_convert_addr probe_spi_at45db at45db_get_sector_count =* probe_82802ab unknown reserved Ready: Busy: BE SUSPEND: BE RUN/FINISH: BE ERROR: BE OK: PROG ERR: PROG OK: VP ERR: VPP OK: PROG SUSPEND: PROG RUN/FINISH: WP|TBL#|WP#,ABORT: UNLOCK: %s: id1 0x%02x, id2 0x%02x , id1 parity violation , id1 is normal flash content , id2 is normal flash content master lock is unlocked! Unlock: Done! Status register: 0x%02x. Disabling lockdown failed! %s: number of sectors=%u not AT45DB321C lock protect %s: committing page failed! Writing page %u failed! %s: Unable to enable SPI! %s: Unable to disable SPI! %s: Unable to execute 8051! %s: Unable to disable EDI! %s: id1 0x%04x, id2 0x%04x %s: reading hwversion failed %s: reading ediid failed %s: Unable to reset 8051! %s: unmapped 0x%0*lx Could not allocate memory! flash chip registers Trying erase function %zi... not defined. 0x%06x-0x%06x: done. Erase/write done. Can't read! Aborting. ERASE FAILED! Found fmap at offset 0x%06zx Out of memory. unused %s: excessive loops, i=0x%x %s called with unknown mask , man_id parity violation retrying. page 0x%lx failed! Full Access. Write Lock (Default State). Write Lock, Locked Down. Read Lock. Read/Write Lock. Read Lock, Locked Down. Enabled lockdown at 0x%0*lx. Error creating layout: %s Gemini Lake Jasper Lake 300 series Cannon Point 500 series Tiger Point 600 series Alder Point Meteor Lake Elkhart Lake C620 series 100 series Assuming chipset '%s'. unnamed internal Calibrating delay loop... %luM loops per second, 10 myus = %ld us, 100 myus = %ld us, 1000 myus = %ld us, 10000 myus = %ld us, %ld myus = %ld us, OK. Read id bytes: %s: addr=0x%x, len=%d, data: No SFDP signature found. SFDP revision = %d.%d ID 0x%02x, version %d.%d Parameter table contents: 0x%04x: %02x 3-Byte only addressing. Status register is WREN (0x06). EWSR (0x50). Write chunk size is at least 64 B. 1 B only. Flash chip size is %d kB. RDID returned %s: unknown page size %d. REMS returned 0x%02x 0x%02x. RES returned %s: id 0x%x %s: id1 0x%x, id2 0x%x %s: id1 0x%02x, id2 0x%02x Register read failed! Memory allocation error! , Initializing %s programmer Erase error occurred Programming error occurred Continuing anyway. Reading flash... Read operation failed! FAILED. Manufacturer: %s Mainboard ID: %s Uh oh. Erase/write failed. Can't even read anymore! Verifying flash... VERIFIED. Reading ich descriptor... Descriptors don't match! fmap found at offset 0x%06zx Failed to realloc. Cannot read ROM contents. DirtyJTAG JTAG probe STMicroelectronics STLINK-V3E STLINK-V3S STLINK-V3 dual VCP STLINK-V3 no MSD Digilent Development board JTAG Winchiphead (WCH) CH341A Microchip PICkit 2 Altera USB-Blaster Marvell 88SX7042 PCI-e 4-port SATA-II Open Graphics Project Development Board OGD1 Intel Silicon Labs Dediprog SF100/SF200/SF600 FTDI FT2232H FT4232H FT232H FT4233H TIAO USB Multi-Protocol Adapter Kristech KT-LINK Amontec JTAGkey GOEPEL PicoTAP Google Servo Servo V2 Legacy Servo V2 FIC Olimex ARM-USB-OCD ARM-USB-TINY ARM-USB-OCD-H ARM-USB-TINY-H ITE 8212F PATA RAID VIA VT6421A Silicon Image SiI 3124 PCI-X SATA Ctrl SiI 3132 SATA Raid II Ctrl Dr. Kaiser PC-Waechter (Actel FPGA) NVIDIA Mutara V08 [NV2] RIVA 128 RIVA TNT RIVA TNT2/TNT2 Pro RIVA TNT2 Ultra Vanta/Vanta LT Aladdin TNT2 GeForce 256 GeForce DDR Quadro GeForce2 MX GeForce2 GO Quadro2 MXR GeForce2 GTS/Pro GeForce2 GTS GeForce2 Ultra Quadro2 Pro GeForce 3 nFX GeForce 3 nFX Ultra Quadro 3 DDC Realtek RTL8139/8139C/8139C+ RTL8169 SMC 1211TX 3COM 3C90xB: PCI 10BASE-T (TPO) 3C90xB: PCI 10BASE-FL 3C90xB: PCI 10BASE-FX 3C905B: Cyclone 10/100/BNC dirtyjtag_spi stlinkv3_spi digilent_spi ch341a_spi pickit2_spi usbblaster_spi linux_spi Device files /dev/spidev*.* linux_mtd Device files /dev/mtd* satamv ogp_spi nicintel_eeprom nicintel_spi nicintel pony_spi rayer_spi developerbox dediprog buspirate_spi serprog ft2232_spi it8212 atavia satasii drkaiser raiden_debug_spi gfxnvidia nicrealtek nic3com dummy ATI SB400 AMD SB600 SB7x0/SB8x0/SB9x0 SC1100 CS5536 Elan SC520 AMD-768 AMD-8111 FCH FP4 SiS 501/5101/5501 85C496+497 620 635 640 645 645DX 651 655 661 730 733 735 740 741 745 746 748 755 5511 5571 5591/5592 5596 5597/5598/5581/5120 CS5530(A) ALi M1533 nForce4/MCP4 CK804 NForce2 NForce3 MCP51 MCP55 MCP61 MCP65 MCP67 MCP78S MCP73 MCP79 MCP89 VT82C585VPX VT82C595 VT82C597 VT8601/VT8601A VT82C69x VT8601T VT82C586A/B VT82C596 VT82C686A/B VT8233 VT8233A VT8235 VT8237(R) VT8251 VT8237A VT8237S VT8231 CX700 VX800/VX820 VX855/VX875 VX900 Broadcom OSB4 HT-1000 RDC R8610/R3210 S12x0 Bay Trail MPIIX Z68 UM67 HM65 HM67 Q65 QS67 Q67 QM67 B65 C202 C204 C206 H61 C60x/X79 Mobile Sample SFF Sample Z77 Z75 Q77 Q75 B75 H77 C216 QM77 QS77 HM77 UM77 HM76 HM75 HM70 NM70 Avoton/Rangeley Braswell DH89xxCC (Cave Creek) Coleto Creek ICH0 ICH2 ICH2-M C-ICH ICH3-S ICH3-M ICH4/ICH4-L ICH4-M ICH5/ICH5R 6300ESB ICH6/ICH6R ICH6-M ICH6W/ICH6RW 631xESB/632xESB/3100 ICH7DH ICH7/ICH7R ICH7M NM10 ICH7MDH ICH8/ICH8R ICH8M-E ICH8DH ICH8DO ICH8M ICH9 Eng. Sample ICH9DH ICH9DO ICH9R ICH9M-E ICH9 ICH9M ICH10R Eng. Sample ICH10DO ICH10R ICH10 ICH10D ICH10 Eng. Sample 3400 Desktop 3400 Mobile PM55 H55 QM57 H57 HM55 Q57 HM57 3400 Mobile SFF B55 QS57 3400 3420 3450 EP80579 PIIX3 PIIX4/4E/4M 440MX SCH Poulsbo Atom E6xx(T) (Tunnel Creek) Lynx Point Mobile Eng. Sample Z87 Z85 HM86 H87 HM87 Q85 Q87 QM87 B85 C222 C224 C226 H81 9 Series 9 Series Engineering Sample Z97 H97 C610/X99 (Wellsburg) Lynx Point LP Eng. Sample Lynx Point LP Premium Lynx Point LP Mainstream Lynx Point LP Value Haswell U Sample Broadwell U Sample Broadwell U Premium Broadwell U Base Broadwell Y Sample Broadwell Y Premium Broadwell Y Base Broadwell H Skylake / Kaby Lake Sample Skylake U Base Skylake Y Premium Skylake U Premium Kaby Lake Y w/ iHDCP2.2 Prem. Kaby Lake U w/ iHDCP2.2 Prem. Kaby Lake U w/ iHDCP2.2 Base Kabe Lake w/ iHDCP2.2 Sample Kaby Lake U Base Kaby Lake Y Premium Kaby Lake U Premium Cannon Lake U Premium Comet Lake U Premium Comet Lake U Base Tiger Lake U Premium Sunrise Point Desktop Sample Sunrise Point Unknown Sample H110 H170 Z170 Q170 Q150 B150 C236 C232 Sunrise Point Server Sample QM170 HM170 CM236 QMS180 HM175 QM175 CM238 QMU185 C620 Series Chipset (QS/PRQ) C621 Series Chipset (QS/PRQ) C622 Series Chipset (QS/PRQ) C624 Series Chipset (QS/PRQ) C625 Series Chipset (QS/PRQ) C626 Series Chipset (QS/PRQ) C627 Series Chipset (QS/PRQ) C628 Series Chipset (QS/PRQ) C629 Series Chipset (QS/PRQ) C621A Series Chipset (QS/PRQ) C627A Series Chipset (QS/PRQ) C629A Series Chipset (QS/PRQ) C620 Series Chipset Supersku C624 Series Chipset Supersku C627 Series Chipset Supersku C621 Series Chipset Supersku C628 Series Chipset Supersku Emmitsburg Chipset SKU H270 Z270 Q270 Q250 B250 Z370 H310C B365 X299 Apollo Lake H310 H370 Z390 Q370 B360 C246 C242 QM370 HM370 CM246 Ice Lake U Premium H470 Z490 Q470 QM480 HM470 WM490 W480 Q570 Z590 H570 B560 H510 W580 WM590 QM580 HM570 Alder Lake-N Alder Lake-P H610 B660 H670 Q670 Z690 W680 W685 WM690 HM670 Meteor Lake-P/M A-Trend ATC-6220 abit A-S78H AN-M2 AV8 AX8 BF6 BM6 BX6 2.0 Fatal1ty F-I90HD IC7 IP35 IP35 Pro IS-10 KN8 Ultra KN9 Ultra NF-M2 nView NF-M2S NF7-S VA6 VT6X4 Acer V75-M EM61SM/EM61PM Acorp 6A815EPD 6M810C ADLINK Express-HR Advantech PCM-5820 agami Aruma Albatron PM266A Pro Alienware Aurora-R2 AOpen i945GMx-VFX UK79G-1394 vKM400Am-S Artec Group DBE61 DBE62 ASI MB-5BLMP ASRock 4CoreDual-VSTA 775Dual-VSTA 775i65G 880G Pro3 890GX Extreme3 939A785GMH/128M 960GM-GS3 FX A330GC A770CrossFire A780FullHD ALiveNF6G-DVI AM2NF6G-VSTA AMCP7AION-HT E350M1/USB3 Fatal1ty 970 Performance Fatal1ty Z77 Performance G31M-GS G31M-S rev 2.0 G41M-VS3 H61M-ITX H67M IMB-180-H K7S41 K7S41GX K7VT4A+ K8S8X M3A790GXH/128M N61P-S N68C-S UCC P4i65G P4i65GV Z68 Extreme4 ASUS A7N8X Deluxe A7N8X-E Deluxe A7N8X-VM/400 A7V133 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SY-6BA+ III SY-7VCA Sun Blade x6250 Fire x4150 Fire x4200 Fire x4540 Fire x4600 Supermicro A1SAi-2550F H8QC8 H8QME-2 X10SLM-F X5DP8-G2 X7DBT-INF X7DWT X7SPA-H(F) X7SPE-HF-D525 X8DT3 X8DT6-F X8DTE-F X8DTG-D X8DTH-6F X8DTT-F X8DTT-HIBQF X8DTU-6TF+ X8DTU-F X8SAX X8SIE(-F) X8SIL-F X8STi X9DR3-F X9DRD-7LN4F X9DRT-HF+ X9DRW X9QRi-F+ X9SCA-F X9SCE-F X9SCL X9SCM-F T-Online S-100 Tekram P6Pro-A5 Termtek TK-3370 (Rev:2.5B) Thomson IP1000 TriGem Anaheim-3 Lomita Tyan S1846 (Tsunami ATX) S2466 (Tiger MPX) S2498 (Tomcat K7M) S2723 (Tiger i7501) S2875 (Tiger K8W) S2881 (Thunder K8SR) S2882-D (Thunder K8SD Pro) S2882 (Thunder K8S Pro) S2891 (Thunder K8SRE) S2892 (Thunder K8SE) S2895 (Thunder K8WE) S2912 (Thunder n3600R) S2915-E (Thunder n6650W) S2915 (Thunder n6650W) S2933 (Thunder n3600S) S3095 (Tomcat i945GM) S3992 (Thunder h2000M) S4882 (Thunder K8QS Pro) S5180 (Toledo i965R) S5191 (Toledo i3000R) S5197 (Toledo i3010W) S5211-1U (Toledo i3200R) S5211 (Toledo i3210W) S5220 (Toledo q35T) S5375-1U (Tempest i5100X) S5375 (Tempest i5100X) S5376 (Tempest i5100W) S5377 (Tempest i5100T) S5382 (Tempest i5000PW) S5397 (Tempest i5400PW) S7066 (S7066WGM3NR) EITX-3000 EPIA M/MII/... EPIA SP EPIA-CN EPIA EK EPIA-EX15000G EPIA-LN EPIA-M700 EPIA-N/NL EPIA-NX15000G NAB74X0 pc2500e PC3500G VB700X ZOTAC GeForce 8200 H61-ITX WiFi (H61ITX-A-E) H67-ITX WiFi (H67ITX-C-E) IONITX-A-E IONITX-F-E ZBOX AD02 (PLUS) ZBOX HD-ID11 ^AV8 bf6 ^i440BX-W977 (BM6)$ ^KN9(NF-MCP55 series)$ (VA6)$ vt6x4 AGAMI ARUMA artecgroup dbe61 dbe62 i965GMt-LA i975Xa-YDG ^iMac5,2$ Apple iMac5,2 ^MacBook2,1$ MacBook2,1 ^ConRoeXFire-eSATA2 ^Kabini CRB$ IMB-A180(-H) ^K7S41 $ ^K7S41GX$ A8AE-LE ^A8J A8Jm NODUSM3 NAGAMI2L ^DSAN-DX$ ^M6Ne$ M6Ne ^OPLX-M$ ^P2B-N$ asus p3b-f ^Guppy ^P4P800-E$ ^P4P800-VM$ ^P4P800-X$ ^P4P800SE$ ^P4PE-X/TE$ ^P5A$ p5a ^P5BV-R$ ^P5GD1 PRO$ ^P5GD1-VM$ ^P5GD2-Premium$ ^P5GD2-X$ ^P5GDC-V$ ^P5GDC$ ^LITHIUM$ ^P5LP-LE$ ^P5LD2$ ^P5LD2-MQ$ ^P5LD2-VM$ ^P5LD2-VM DH$ ^P5N-D$ ^P5N-E SLI$ ^P5W DH Deluxe$ ^CUSL2-C ^TUSL2-C ^U38N$ U38N Bcom/Clientron WinNET P680 ^KM266-8235$ biostar m7viq ^Latitude D630 ^AD77 dfi ad77 A928 epox ep-bx3 ^XY680 Amilo Xi 3650 ^6IEM ^8IP775/-G$ ^GA-8SIMLFS20$ ^GA-8SIMLH$ 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28F004B5/BE/BV/BX-T 28F008S3/S5/SC 28F400BV/BX/CE/CV-B 28F400BV/BX/CE/CV-T AT82802AB 82802AC Macronix MX23L12854 MX23L1654 MX23L3254 MX23L6454 MX25L1005(C)/MX25L1006E MX25L12805D MX25L1605 MX25L1635D MX25L1635E MX25L2005(C)/MX25L2006E MX25L25635F/MX25L25645G MX25L3205(A) MX25L3205D/MX25L3208D MX25L3206E/MX25L3208E MX25L3235D MX25L3233F/MX25L3273E MX25L4005(A/C)/MX25L4006E MX25L512(E)/MX25V512(C) MX25L5121E MX25L6405 MX25L6405D MX25L6406E/MX25L6408E MX25L6495F MX25R3235F MX25R6435F MX25U12835F MX25U1635E MX25U25635F MX25U3235E/F MX25U51245G MX25U6435E/F MX25U8032E MX29F001B MX29F001T MX29F002(N)B MX29F002(N)T MX29F022(N)B MX29F022(N)T MX29F040 MX29GL128F MX29GL320EB MX29GL320EH/L MX29GL320ET MX29GL640EB MX29GL640EH/L MX29GL640ET MX29LV040 MX66L51235F/MX25L51245G MX66L1G45G Micron/Numonyx/ST M25P05 M25P05-A M25P10 M25P10-A M25P128 M25P16 M25P20 M25P20-old M25P32 M25P40 M25P40-old M25P64 M25P80 M25PE10 M25PE16 M25PE20 M25PE40 M25PE80 M25PX16 M25PX32 M25PX64 M25PX80 M45PE10 M45PE16 M45PE20 M45PE40 M45PE80 N25Q00A..1G N25Q00A..3G N25Q016 N25Q032..1E N25Q032..3E N25Q064..1E N25Q064..3E N25Q128..1E N25Q128..3E N25Q256..1E N25Q256..3E N25Q512..1G N25Q512..3G Micron MT25QL01G MT25QU01G MT25QL02G MT25QU02G MT25QU128 MT25QL128 MT25QL256 MT25QU256 MT25QL512 MT25QU512 V29C51000B V29C51000T V29C51400B V29C51400T V29LC51000 V29LC51001 V29LC51002 Nantronics PMC Pm25LD010(C) Pm25LD020(C) Pm25LD040(C) Pm25LD256C Pm25LD512(C) Pm25LQ016 Pm25LQ020 Pm25LQ032C Pm25LQ040 Pm25LQ080 Pm25LV010 Pm25LV010A Pm25LV016B Pm25LV020 Pm25LV040 Pm25LV080B Pm25LV512(A) Pm29F002B Pm29F002T Pm39LV010 Pm39LV020 Pm39LV040 Pm39LV512 Pm49FL002 Pm49FL004 SST SST25LF020A SST25LF040A SST25LF080(A) SST25VF010(A) SST25VF016B SST25VF020 SST25VF020B SST25VF032B SST25VF040 SST25VF040B SST25VF040B.REMS SST25VF064C SST25VF080B SST25VF512(A) SST25WF010 SST25WF020 SST25WF020A SST25WF040 SST25WF040B SST25WF080 SST25WF080B SST25WF512 SST26VF016B(A) SST26VF032B(A) SST26VF064B(A) SST28SF040A SST29EE010 SST29EE020A SST29LE010 SST29LE020 SST39SF010A SST39SF020A SST39SF040 SST39SF512 SST39VF010 SST39VF020 SST39VF040 SST39VF080 SST39VF512 SST49LF002A/B SST49LF003A/B SST49LF004A/B SST49LF004C SST49LF008A SST49LF008C SST49LF016C SST49LF020 SST49LF020A SST49LF040 SST49LF040B SST49LF080A SST49LF160C M29F002B M29F002T/NT M29F040B M29F400BB M29F400BT M29W010B M29W040B M29W512B M50FLW040A M50FLW040B M50FLW080A M50FLW080B M50FW002 M50FW016 M50FW040 M50FW080 M50LPW080 M50LPW116 M95M02 Sanyo LE25FU106B LE25FU206 LE25FU206A LE25FU406B LE25FU406C/LE25U40CMC LE25FW106 LE25FW203A LE25FW403A LE25FW406A LE25FW418A LE25FW806 LE25FW808 Sharp LH28F008BJT-BTLZ1 LHF00L04 Spansion S25FL004A S25FL008A S25FL016A S25FL032A/P S25FL064A/P S25FL116K/S25FL216K S25FL127S-256kB S25FL127S-64kB S25FL128L S25FL128P......0 S25FL128P......1 S25FL128S......0 S25FL128S......1 S25FL129P......0 S25FL129P......1 S25FL132K S25FL164K S25FL204K S25FL208K S25FL256L S25FL256S Large Sectors S25FL256S Small Sectors S25FL256S......0 S25FL512S S25FS128S Large Sectors S25FS128S Small Sectors SyncMOS/MoselVitelic {F,S,V}29C51001B {F,S,V}29C51001T {F,S,V}29C51002B {F,S,V}29C51002T {F,S,V}29C51004B {F,S,V}29C51004T {S,V}29C31004B {S,V}29C31004T TMS29F002RB TMS29F002RT Winbond W25P16 W25P32 W25P80 W25Q128.V W25Q128.V..M W25Q128.W W25Q128.JW.DTR W25Q16.V W25Q16.W W25Q20.W W25Q256FV W25Q256JV_Q W25Q256JV_M W25Q256JW W25Q256JW_DTR W25Q32.V W25Q32.W W25Q32JW...M W25Q40.V W25Q40BW W25Q40EW W25Q512JV W25Q512NW-IM W25Q64BV/W25Q64CV/W25Q64FV W25Q64JV-.Q W25Q64JV-.M W25Q64.W W25Q64JW...M W25Q80.V W25Q80BW W25Q80EW W25X05 W25X10 W25X16 W25X20 W25X32 W25X40 W25X64 W25X80 W29C020(C)/W29C022 W29C040/P W29C512A/W29EE512 W29GL032CB W29GL032CH/L W29GL032CT W29GL064CB W29GL064CH/L W29GL064CT W29GL128C W39F010 W39L010 W39L020 W39L040 W39V040A W39V040B W39V040C W39V040FA W39V040FB W39V040FC W39V080A W39V080FA W39V080FA (dual mode) W49F002U/N W49F020 W49V002A W49V002FA XMC XM25QH64C XM25QU64C XM25QH128C XM25QU128C XM25QH256C XM25QU256C Zetta Device ZD25D20 ZD25D40 Unknown SFDP-capable chip Programmer Opaque flash chip unknown AMIC SPI chip unknown Atmel SPI chip unknown Eon SPI chip unknown Macronix SPI chip unknown PMC SPI chip unknown SST SPI chip unknown ST SPI chip unknown Sanyo SPI chip Generic unknown SPI chip (RDID) unknown SPI chip (REMS) Unknown ICH ICH8 5 series Ibex Peak 6 series Cougar Point 7 series Panther Point 8 series Lynx Point Baytrail 8 series Lynx Point LP 8 series Wellsburg 9 series Wildcat Point 9 series Wildcat Point LP 100 series Sunrise Point C620 series Lewisburg 400 series Comet Point fd bios pd reg5 bios2 reg7 reg9 ie 10gbe reg12 reg13 reg14 reg15 20 MHz 33 MHz 50 MHz 48 MHz 30 MHz 40 MHz 25 MHz 14 MHz / 17 MHz 100 MHz 14 MHz 512 kB 1 MB 8 MB 16 MB 32 MB 64 MB %s failed ULBPR failed no sectors are protected some sectors are protected all sectors are protected reserved for future use full access write locked locked open write locked down OK failed SPI bulk read failed! Restoring MMIO space at %p page_size=%lx context Error: %s Using custom baud rate. %s: error: %s %s: Failed to %s %d bytes Wrote %d bytes: Read %d bytes: dis %s, writecnt=%i, readcnt=%i bottom en Couldn't initialize libusb! disabled. Bottom boot block: Top boot block: Lockout bits: succeeded 0 1 3 >=64 busy ready Accessing byte(s):%s%s%s%s No ROM device found. Access is a %s. Device is %s. %s: 0x%02x to 0x%*lx. not ready after write not ready after read %s: 0x%02x from 0x%*lx. memory /dev/mem /dev/mem mmap failed: %s %s: Out of memory! Could not lseek() MSR: %s Could not read() MSR: %s PCI header type 0x%02x Requested BAR is of type I/O MEM ROM , %sbit, %sprefetchable pci Error: %s offset Missing argument for offset. BROM base=0x%08x Controller not ready. Cannot open serial port: Serial port write error! Empty write Serial port is unresponsive! Serial port read error! Empty read %s: write %i, read %i Zero length command! Sending , receiving BBIO Raw bitbang mode version %c Bus Pirate shutdown failed. 30k 115200 spispeed serialspeed pullups off psus irate Detected Bus Pirate hardware 0123456789 %u.%u ("%s") Detected Bus Pirate firmware HiZ> Using SPI command set v2. SPI speed is %sHz Serial speed is %d baud Raw SPI mode version %c Enabling pull-up resistors. Enabling PSUs. Found a %s SF100 SF200 SF%d V:%d.%d.%d 230400 250000 2000000 125k 250k 1M 2.6M none 0x70000-0x7ffff 0x60000-0x7ffff 0x40000-0x7ffff all blocks 1F0000H-1FFFFFH 1E0000H-1FFFFFH 1C0000H-1FFFFFH 180000H-1FFFFFH 100000H-1FFFFFH all %s: addr=0x%lx, val=0x%02x %s: addr=0x%lx, val=0x%04x %s: addr=0x%lx, val=0x%08x %02x BIOS ROM is disabled Unable to contact device. Failed to read device. Failed to write to device. 24M voltage Empty voltage= specified. milliv Garbage voltage= specified. Setting voltage to %i mV %c%c%d Error: %s is an invalid id! Using device %li. target Using target %s. Could not initialize libusb! Could not read id. Found dediprog id SF%06d. Using dediprog id SF%06d. Unexpected response to init! Disabling standalone mode. Serial number is %s %s: short write %s: short read reset iCE40 %s: failed to meet expected Invalid frequency "%s", %s khz mhz No data in flash context! %s: writing %u bytes: No command sent to the chip! WRSR wrote 0x%02x%02x%02x. WRSR wrote 0x%02x%02x. WRSR wrote 0x%02x. WRSR2 wrote 0x%02x. WRSR3 wrote 0x%02x. BYTE PROGRAM size too short! Failed to program flash! Failed to erase flash! reading %u bytes: Writing %s No filename specified. wb bus Requested buses are: %s default parallel+lpc+fwh+spi+prog parallel lpc fwh PROG spi_write_256_chunksize spi_blacklist SPI blacklist is %2x , size %u spi_ignorelist SPI ignorelist is freq Invalid units: %s hwwp yes hwwp can be "yes" or "no" emulate M25P10.RES SST25VF040.REMS MX25L6436 W25Q128FV VARIABLE_SIZE erase_to_zero spi_status image matches. Reading %s rb Unable to read %s doesn't match. Releasing I/Os ftdi_write_data: %d, %s Command does not fit Assert CS# De-assert CS# send_buf failed: %i ftdi_read_data: %d, %s get_buf failed: %i unknown device unknown vendor type jtagkey picotap tumpa tumpalite busblaster openmoko arm-usb-ocd arm-usb-tiny arm-usb-ocd-h arm-usb-tiny-h google-servo google-servo-v2 google-servo-v2-legacy flyswatter kt-link divisor csgpiol gpiol%d Using device type %s %s channel %s. ftdi_init failed. serial description Set clock divisor No loopback of TDI/DO TDO/DI Set data bits Set data bits HighByte Disabling byte merging Strapped to LPC. SPI. MMIO not enabled! VIA VX MMIO register SPI Bus0 disabled! SPI Bus1 is enabled too. No MSR initialized. OK Flash bus type is LPC Flash bus type is SPI Odd. SMBus device not found. MCP SPI BAR is at 0x%08x NVIDIA MCP6x SPI MCP SPI is not used. Elan SC520 MMCR No southbridge found for %s! GCS BIOS_SPI_BC enabled (A16(+) inverted) not enabled %s = 0x%x: Boot BIOS Straps: 0x%x (%s) Top Swap: %s SPI Read Configuration: BIOS_CNTL = 0x%02x: BIOS Lock Enable: %sabled, BIOS Write Enable: %sabled BYT IBASE fwh_idsel ICH RCRB SPIBAR = 0x%0*lx + 0x%04x BYT RCRB SPI_BASE_ADDRESS = 0x%x BYT SBASE write read GPIO SPI_HOLD SPI base address is at 0x%x SB600 SPI registers SB6xx detected. (0x%08x) SpiArbEnable=%i , SpiBridgeDisable=%i SB7xx/SP5100 detected. SpiRomEnable=%i , PrefetchEnSPIFromIMC=%i , SpiOpEnInLpcMode=%i , PrefetchEnSPIFromHost=%i Hudson-2/3/4 detected. Bolton detected. Yangtze detected. , RouteTpm2Sp=%i , IllegalAccess=%i , SpiBusy=%i Using SPI_CS%d GPIO11 used for %s GPIO12 used for %s SPI_DI Not enabling SPI GPIO31 used for %s SPI_CS GPIO32 used for %s SPI_CLK GPIO47 used for %s spireadmode SPI read mode is %s (%i) UseSpi100 is %sabled Enabling Spi100 failed. Enabling Spi100 succeeded. NormSpeedNew is %s FastSpeedNew is %s AltSpeedNew is %s TpmSpeedNew is %s Fast Reads are %sabled Disabling them temporarily. NormSpeed is %s 16.5 MHz amd_imc_force amd_imc_force enabled. IMC is not active. No IMC found. Shutting down IMC failed. : LPC : PCI : FWH : SPI SPI_DO Normal (up to 33 MHz) Reserved Dual IO (1-1-2) Quad IO (1-1-4) Dual IO (1-2-2) Quad IO (1-4-4) Normal (up to 66 MHz) Fast Read 66 MHz 22 MHz 800 kHz eSPI 500k 62.5k 12M 3M 2.18M 1.5M 750k 375k Whitelisted laptop detected. Bad table checksum: %04x. Bad record count: %d. SSFS: SCIP %s=%d, FDONE FCERR AEL %s=%d SSFC: SCGO ACS SPOP COP SME SCF s with a combined with a density of %d kB. %s: null OPCODES pointer! Unsupported chip size 0x%x Bad header checksum. Flash update failed wbsio_spibase = 0x%x cmd=%02x mode=%02x data=0x%02x addr=0x%02x data=0x %s: returning data = Timeout reading heading byte Timeout writing heading word Timeout reading tail byte Timeout writing Shadow RAM Filling FIFO: reset [%02x] Executing... done Skipping: Reading FIFO: Filling buffer: Reading buffer: %s: only supports STATUS1 Reading Status register Writing status register IT8212F flash %s/%s Cannot open %s Error reading %s Error reading %s: %s Cannot seek to 0x%06x: %s Failed to flush buffer: %s %s: ioctl: %s /sys/class/mtd %s/mtd%d %s does not exist %s/mtd%d/ nor /dev Cannot stat "%s": %s flags MTD size is not a power of 2 erasesize numeraseregions r+ Opened %s successfully %s: invalid clock: %s kHz Using device %s %s: failed to open %s: %s Using %ukHz clock Cannot open %s: %s. Cannot read %s: %s. %s: max_kernel_buf_size: %zu matching %s against %s boardenable boardmismatch force_I_want_a_brick this_is_not_a_laptop Missing argument for laptop. mainboard low megabyte high tables No coreboot table found. Using Internal DMI decoder. _DMI_ DMI Table Unable to access DMI Table Not Specified <OUT OF BOUNDS> <BAD INDEX> No DMI table found. Laptop detected via DMI. DMI string %s: "%s" Found chipset "%s %s" with PCI ID %04x:%04x Enabling flash write... PROBLEMS, continuing anyway FATAL ERROR! dualbiosindex DualBIOS: Selected chip: %d Serial flash pin %i Serial flash port 0x%04x it87spiport Aborting to be safe. IMC SIO is at 0x%x. IMC MBOX is at 0x%x. IMC MBOX: Timeout! Resuming IMC failed) IMC resumed. HSFS: BERASE PRR34_LOCKDN WRSDIS FDOPSS FDV FLOCKDN HSFC: FGO FCYCLE WET FDBC VIA SPI MMIO registers 0x00: 0x%04x (SPIS) 0x02: 0x%04x (SPIC) 0x04: 0x%08x (SPIA) 0x%02x: 0x%08x (SPID%d) 0x%02x: 0x%08x (SPID%d+4) 0x50: 0x%08x (BBAR) 0x54: 0x%04x (PREOP) 0x56: 0x%04x (OPTYPE) 0x58: 0x%08x (OPMENU) 0x5c: 0x%08x (OPMENU+4) 0x%02x: 0x%08x (PBR%d) %s: unsupported chipset Opcode %x not found. Transaction error! Running OPCODE 0x%02x failed at address 0x%06x (payload length was %d). The data was: %3d: 0x%02x timeout, REG_SSFS=0x%08x Error: SCIP never cleared! ich_spi_mode hwseq user selected hwseq swseq user selected swseq auto user selected auto 0x04: 0x%04x (HSFS) 0x08: 0x%08x (FADDR) 0x06: 0x%04x (HSFC) 0x50: 0x%08x (FRAP) BMWAG 0x%02x, BMRAG 0x%02x, BRWA 0x%02x, BRRA 0x%02x 0x0c: 0x%08x (DLOCK) DLOCK: SBMWAG_LOCKDN SBMRAG_LOCKDN %s=%d, PR0_LOCKDN PR1_LOCKDN PR2_LOCKDN PR3_LOCKDN PR4_LOCKDN SSEQ_LOCKDN 0x%02X: 0x%08x PR%u is 0x%08x already. , trying to set it to 0x%08x resulted in 0x%08x. 0x%zx: 0x%02x (SSFS) Clearing SSFS.FCERR 0x%zx: 0x%06x (SSFC) 0x%zx: 0x%04x (PREOP) 0x%zx: 0x%04x (OPTYPE) 0x%zx: 0x%08x (OPMENU) 0x%zx: 0x%08x (OPMENU+4) 0x%x: 0x%08x (BBAR) 0x%x: 0x%08x (LVSCC) LVSCC: 0x%x: 0x%08x (UVSCC) UVSCC: 0x%x: 0x%08x (VSCC) 0x%x: 0x%08x (FPB) === Content Section === FLVALSIG 0x%08x FLMAP0 0x%08x FLMAP1 0x%08x FLMAP2 0x%08x --- Details --- === Component Section === FLCOMP 0x%08x FLILL 0x%08x FLILL1 0x%08x Component 2 is not used. Fast Read is %ssupported. No forbidden opcodes. === Region Section === FLREG%zd 0x%08x Region %d (%-7s) is unused. 0x%08x - 0x%08x === Master Section === FLMSTR%zd 0x%08x %-4s %c%c %c%c checking for opcode 0x%02x DE IE ME BIOS FD Reg15 Reg14 Reg13 OpROM 10GbE IE DE2 BMC Reg7 BIOS2 DE Pltf GbE TXE 0x%02x: 0x%08x (PBR%u) Intel NIC flash Intel NIC control/status reg Flash Descriptor Management Engine Gigabit Ethernet Platform Data Device Expansion EC/BMC read-write write-only read-only locked 24 MHz 60 MHz Descr. Platf. DevExp Other Low Profile Desktop Mini Tower Portable Laptop Hand Held Sub Notebook Main Server Chassis Rack Mount Chassis Sealed-case PC Multi-system system-manufacturer system-product-name system-version baseboard-manufacturer baseboard-product-name baseboard-version dlc5_preinit dlc5_shutdown byteblaster_preinit byteblaster_shutdown stk200_init stk200_shutdown SATA SiI registers Send SPI failed! Receive SPI failed Command Shutdown failed! Pony SPI shutdown completed. ../raiden_debug_spi.c libusb error: %s:%d %s ../usb_device.c USB: Failed to open device Error: cannot write command serprog: readb byteread %s: addr=0x%lx len=%zu %s usecs=%d STLINK_BRIDGE_CS_SPI SPI read/write failure: %d STLINK_BRIDGE_CLOSE writing %d-byte packet USB-Blaster write failed reading %d-byte packet USB-Blaster read failed USB-Blaster reset failed writecnt %u wr_bytes %u wrote %zd bytes Serial port write error: write successful readcnt %u rd_bytes %u read %zd bytes Serial port read error: Using IT87 GPIO base 0x%04x Rais Dropp /dev/cpu/%d/msr MSR was already initialized Error while opening %s: %s Did you run 'modprobe msr'? BES=0x%x, WG=%d, WSR=%d, WEWS=%d, EO=0x%x , VCL=%d bprom cprom s3 OGP registers millivolt Setting voltage to %i mV. Command Set Voltage failed! Command Setup failed! SI-Prog serbang si_prog ajawe AJAWe Using %s programmer pinout. Raiden target: %d custom_rst true false Invalid custom rst param: %s Invalid target: %s vid pid address interface altsetting subclass protocol Raiden: libusb_init failed USB: Failed to find config copy != NULL USB: Found matching device rayer iobase Using %s pinout. serprog: IP %s port %d Error: cannot resolve %s serprog: Synchronized ST_GETVERSION_EXT Failed to query FW version STLINK_BRIDGE_GET_CLOCK SCK frequency set to %d kHz STLINK_BRIDGE_INIT_SPI invalid Reading OPCODES... Programming OPCODES... op[%d]: 0x%02x, %s, %s %.*s Can't allocate PCI accessor. Can't allocate PCI device. SPIBAR Stuck at 0x%02x. Stuck at 0x%02x Could not write() MSR: %s No Sector is %sed. Sector 0a is %s%sed. Sector 0b is %s%sed. Sector %2u is %s%sed. Enumerated range: CMP=%u SEC=%u TB=%u BP%zu=%u Probing for %s %s, %d kB: complete flash Non-SPI, Parallel, LPC, FWH, Programmer-specific, None, Found on %s. Marvell 88SX7042 registers Flash Parameters: TurnOff=0x%01x Acc2First=0x%01x Acc2Next=0x%01x ALE2Wr=0x%01x WrLow=0x%01x WrHigh=0x%01x Reserved[21:20]=0x%01x TurnOffExt=0x%01x Acc2FirstExt=0x%01x Acc2NextExt=0x%01x ALE2WrExt=0x%01x WrLowExt=0x%01x WrHighExt=0x%01x Reserved[31:28]=0x%01x Expansion ROM BAR Control: ExpROMSz=0x%01x Bar2En=0x%01x BAR2TransAttr=0x%01x BAR2Sz=0x%01x GPIOPortMode=0x%01x Activating I/O BAR at 0x%04x BBAR offset is unknown! 0 1 read w/o addr write w/o addr read w/ addr write w/ addr RayeR SPIPGM xilinx byteblastermv Altera ByteBlasterMV stk200 Atmel STK200/300 adapter wiggler Wiggler LPT spi_tt SPI Tiny Tools (SPI_TT LPT) 333k block lock at %06x is %slocked! At least one block is locked and lockdown is active! Reading the status register failed! Sending disable lockdown failed! Chip status register is 0x%02x Chip status register: Bit 7 / Ready is %sset Chip status register: Bit 6 / Compare match is %sset Chip status register: Bit %i is %sset Chip status register: Density is %u Mb Chip status register: Bit 1 / Protection is %sset Chip status register: Bit 0 / "Power of 2" is %sset %s: addr=0x%x, page_size=%u, page_bits=%u -> at45db_addr=0x%x %s: tried to read beyond flash boundary: addr=%u, len=%u, size=%u %s: error sending read command! %s: error sending erase command! %s: chip did not become ready again after sending the erase command! %s: cannot erase partial pages: addr=%u, blocklen=%u %s: tried to erase a sector beyond flash boundary: addr=%u, blocklen=%u, size=%u %s: tried to erase a block beyond flash boundary: addr=%u, blocklen=%u, size=%u %s: tried to erase beyond flash boundary: addr=%u, blocklen=%u, size=%u %s: cannot erase partial sectors: addr=%u, blocklen=%u %s: cannot write partial pages: start=%u, len=%u %s: tried to write beyond flash boundary: start=%u, len=%u, size=%u %s: error sending buffer write! %s: filling the buffer failed! %s: error sending buffer to main memory command! %s: chip did not become ready again! Incomplete SPI bitbang master setting! Please report a bug at flashrom@flashrom.org %s: Retrying read with greater buffer length! %s: Maximum buffer length reached and data still not ready! %s: Block erase size is not page size! %s: Timed out waiting for SPI not busy! %s: Start address is not page-aligned! %s: Length is not page-aligned! Tried to register more than %i shutdown functions. Tried to register a shutdown function before programmer init. %s: hwversion 0x%02x, ediid 0x%02x %s: mapping %s from 0x%0*lx to 0x%0*lx FAILED at 0x%08x! Expected=0x%02x, Found=0x%02x, failed byte count from 0x%08x-0x%08x: 0x%x Error: %s called with start 0x%x + len 0x%x > total_size 0x%x ERROR: flashrom has no read function for this flash chip. Verification impossible because read failed at 0x%x (len 0x%x) %s: Unsupported granularity! Please report a bug at flashrom@flashrom.org Could not map flash chip %s at 0x%0*lx. Could not map flash chip registers %s at 0x%0*lx. Erasing and writing flash chip... eraseblock layout is known, but matching block erase function is not implemented. block erase function found, but eraseblock layout is not defined. Reading current flash chip contents... Can't read anymore! Aborting. Looking for another erase function. No usable erase functions left. Warning: Chip content is identical to the requested image. fmap size exceeds buffer boundary. Unable to find fmap in provided buffer. Density encoding is unknown on this chipset. Density of ICH SPI component with index %d is invalid. Encoded density is 0x%x while maximum allowed is 0x%x. %s: man_id 0x%02x, dev_id 0x%06x , man_id seems to be normal flash content , dev_id seems to be normal flash content writing sector at 0x%lx failed! %s called with incorrect arguments Chip lacks correct probe timing information, using default 10ms/40us. Chip has negative value in probe_timing, failing without chip access Lock status of block at 0x%0*lx is Locked Open (Full Access, Locked Down). Read/Write Lock, Locked Down. Invalid lock change from 0x%02x to 0x%02x requested at 0x%0*lx! Please report a bug at flashrom@flashrom.org Lock bits at 0x%0*lx not changed. Lockdown can't be removed at 0x%0*lx! New value: 0x%02x. Changing lock bits failed at 0x%0*lx! New value: 0x%02x. Changed lock bits at 0x%0*lx to 0x%02x. Enabling lockdown FAILED at 0x%0*lx! New value: 0x%02x. Added layout entry %08zx - %08zx named %s Error adding layout entry: %s Peculiar flash descriptor, assuming %s compatibility. Unknown flash descriptor, assuming 500 series compatibility. The flash descriptor looks like a Skylake/Sunrise Point descriptor. However, the read frequency isn't set to 17MHz (the only valid value). Please report this message, the output of `ich_descriptors_tool` for your descriptor and the output of `lspci -nn` to flashrom@flashrom.org The flash descriptor has the read frequency set to 17MHz. However, it doesn't look like a Skylake/Sunrise Point compatible descriptor. Please report this message, the output of `ich_descriptors_tool` for your descriptor and the output of `lspci -nn` to flashrom@flashrom.org %s():%d, returned with value %d. Programmer with index %d is NULL instead of a valid pointer! All programmers need a valid name, but the one with index %d does not! Programmer %s has neither a device list nor a textual description! Programmer %s does not have a valid type set! Programmer %s does not have a valid init function! ERROR: Some field of flash chip #%d (%s) is misconfigured. Please report a bug at flashrom@flashrom.org ERROR: Flash chip %s erase function %i region %i has size 0. Please report a bug at flashrom@flashrom.org ERROR: Flash chip %s erase function %i region %i has count 0. Please report a bug at flashrom@flashrom.org Strange: Empty eraseblock definition with non-empty erase function. Not an error. ERROR: Flash chip %s erase function %i region walking resulted in 0x%06x bytes total, expected 0x%06x bytes. Please report a bug at flashrom@flashrom.org ERROR: Flash chip %s erase function %i and %i are identical. Please report a bug at flashrom@flashrom.org ERROR: Flash chip %s erase function %i is not in order. Please report a bug at flashrom@flashrom.org ERROR: Board enable #%d does not define a vendor and board name. Please report a bug at flashrom@flashrom.org ERROR: Board enable for %s %s is misdefined. Please report a bug at flashrom@flashrom.org OS timer resolution is %lu usecs, OS timer resolution is unusable. timer loop overflow, reduced precision. delay more than 10%% too short (got %lu%% of expected delay), recalculating... delay loop is unreliable, trying to continue %s failed during command execution Restoring CR3NV value to 0x%02x Receiving SFDP signature failed. Signature = 0x%08x (should be 0x50444653) Receiving SFDP revision and number of parameter headers (NPH) failed. The chip supports an unknown version of SFDP. Aborting SFDP probe! SFDP number of parameter headers is %d (NPH = %d). Receiving SFDP parameter table headers failed. SFDP parameter table header %d/%d: Length %d B, Parameter Table Pointer 0x%06x SFDP Parameter Table %d supposedly overflows addressable SFDP area. This most probably indicates a corrupt SFDP parameter table header. Skipping it. Fetching SFDP parameter table %d failed. ID of the mandatory JEDEC SFDP parameter table is not 0 as demanded by JESD216 (warning only). The chip contains an unknown version of the JEDEC flash parameters table, skipping it. Length of the mandatory JEDEC SFDP parameter table is wrong (%d B), skipping it. Parsing JEDEC flash parameter table... 3-Byte (and optionally 4-Byte) addressing. 4-Byte only addressing (not supported by flashrom). Required addressing mode (0x%x) not supported. volatile and writes to the status register have to be enabled with non-volatile and the standard does not allow vendors to tell us whether EWSR/WREN is needed for status register writes - assuming EWSR. 4kB erase opcode is 0x%02x. 4kB erase opcode is not defined. Flash chip size >= 4 Gb/512 MB not supported. Flash chip size is bigger than what 3-Byte addressing can access. It seems like this chip supports the preliminary Intel version of SFDP, skipping processing of double words 3-9. Erase Sector Type %d Size: 0x%02x Erase Sector Type %d is unused. Block size of erase Sector Type %d (2^%d) is too big for flashrom. Erase Sector Type %d Opcode: 0x%02x %d byte RDID not supported on this SPI controller RDID byte 0 parity violation. RDID byte 1 parity violation. %s: total size %i kB, page size %i B Ignoring RES in favour of RDID. Ignoring RES in favour of REMS. Invalid programmer specified! Unhandled programmer parameters (possibly due to another failure): %s Unhandled programmer parameters: %s Error: Unknown programmer "%s". Valid choices are: Attempting to read fmap from buffer. Failed to read fmap from buffer. Adding fmap layout to global layout. Failed to add fmap regions to layout. Tried to register more than %i master interfaces. %s called with incomplete master definition. Please report a bug at flashrom@flashrom.org %s called with incomplete master definition. FWH/LPC masters must provide memory mappings. Please report a bug at flashrom@flashrom.org %s: Unable to enable uniform block sizes. %s: CR3NV updated (0x%02x -> 0x%02x) Tried to register more than %i chip restore functions. %s failed during command execution at address 0x%x Flash misses feature flag for extended-address register. 4-byte address requested but master can't handle 4-byte addresses. Can't handle 4-byte address for opcode '0x%02x' with this chip/programmer combination. %s called for too long a write %s: start address not even! Please report a bug at flashrom@flashrom.org %s: total write length not even! Please report a bug at flashrom@flashrom.org %s failed during followup AAI command execution: %d %s failed to disable AAI mode. Write/erase is not working yet on your programmer in its current configuration. Read is not working on this chip. flashrom has no read function for this flash chip. Erase is not possible on this chip. Erase is not working on this chip. flashrom has no erase function for this flash chip. Write is not possible on this chip. Write is not working on this chip. flashrom has no write function for this flash chip. Warning: Address range of region "%s" exceeds the current chip's address space. Error: Size of the address range of region "%s" is not positive. Requested regions can not be handled. Aborting. Programmer doesn't support this chip. Aborting. Failed to set correct 4BA mode! Aborting. Flash image seems to be a legacy BIOS. Disabling coreboot-related checks. Flash image seems to have garbage in the ID location. Disabling coreboot-related checks. coreboot last image size (not ROM size) is %d bytes. This coreboot image matches this mainboard. This coreboot image (%s:%s) does not appear to be correct for the detected mainboard (%s:%s). Proceeding anyway because user forced us to. Aborting. You can override this with -p internal:boardmismatch=force. Assuming old flash chip contents as ref-file... Reading old flash chip contents... Checking if anything has changed. Good, writing to the flash chip apparently didn't do anything. This means we have to add special support for your board, programmer or flash chip. Please report this to the mailing list at flashrom@flashrom.org or on IRC (see https://www.flashrom.org/Contact for details), thanks! ------------------------------------------------------------------------------- You may now reboot or simply leave the machine running. Please check the connections (especially those to write protection pins) between the programmer and the flash chip. If you think the error is caused by flashrom please report this to the mailing list at flashrom@flashrom.org or on IRC (see https://www.flashrom.org/Contact for details), thanks! Apparently at least some data has changed. Your flash chip is in an unknown state. Get help on IRC (see https://www.flashrom.org/Contact) or mail flashrom@flashrom.org with the subject "FAILED: <your board name>"!------------------------------------------------------------------------------- DO NOT REBOOT OR POWEROFF! Please report this to the mailing list at flashrom@flashrom.org or on IRC (see https://www.flashrom.org/Contact for details), thanks! Couldn't parse the descriptor! Attempting to read fmap from ROM content. Cannot read %d bytes at offset %zu Cannot read %zu bytes at offset %06zx fmap signature found at %zu but header is invalid. Binary search failed, trying linear search... Failed to read fmap from ROM. 82580 Quad Gigabit Ethernet Controller (Copper) 82580 Quad Gigabit Ethernet Controller (Fiber) 82580 Quad Gigabit Ethernet Controller (Backplane) 82580 Quad Gigabit Ethernet Controller (Ext. PHY) 82580 Dual Gigabit Ethernet Controller (Copper) Unprogrammed 82580 Quad/Dual Gigabit Ethernet Controller I210 Gigabit Network Connection Unprogrammed I211 Gigabit Network Connection Unprogrammed I210 Gigabit Network Connection I210 Gigabit Network Connection SERDES Fiber I210 Gigabit Network Connection SERDES Backplane I210 Gigabit Network Connection SGMII I211 Gigabit Network Connection 82571EB Gigabit Ethernet Controller 82541GI Gigabit Ethernet Controller 82541PI Gigabit Ethernet Controller 82572EI Gigabit Ethernet Controller 82574L Gigabit Ethernet Controller 82599 10 Gigabit Unprogrammed Network Controller 82599 10 Gigabit KX4 Dual Port Network Controller 82599 10 Gigabit Dual Port Backplane Controller 82599 10 Gigabit CX4 Dual Port Network Controller 82599 10-Gigabit SFI/SFP+ Network Controller 82599 10 Gigabit XAUI/BX4 Dual Port Network Controller 82599 10 Gigabit KR Network Controller 82599 10 Gigabit TN Network Controller 82599 10 Gigabit Dual Port Network Controller with FCoE 82599 10 Gigabit Dual Port Backplane Controller with FCoE 82599 10 Gigabit SFI Network Controller 8255xER/82551IT Fast Ethernet Controller 82557/8/9/0/1 Ethernet Pro 100 CP2102N USB to UART Bridge Controller USB Multi-Protocol Adapter Lite OpenMoko Neo1973 Debug board (V2+) PCI0680 Ultra ATA-133 Host Ctrl SiI 3112 [SATALink/SATARaid] SATA Ctrl SiI 3114 [SATALink/SATARaid] SATA Ctrl SiI 3512 [SATALink/SATARaid] SATA Ctrl RIVA TNT2 Model 64/Model 64 Pro 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-TX 3C90xB: PCI 10/100 Mbps; shared 10BASE-T/100BASE-T4 3C90xB: PCI 10BASE-T/10BASE2/AUI (COMBO) 3C90xB: PCI 10BASE-T/10BASE2 (TPC) 3C905C: EtherLink 10/100 PCI (TX) 3C980C: EtherLink Server 10/100 PCI (TX) Programmers compatible with SI-Prog, serbang or AJAWe RayeR parallel port programmer Dangerous Prototypes Bus Pirate All programmer devices speaking the serprog protocol Dummy device, does nothing and logs all accesses Lynx Point Desktop Eng. Sample 270-WS-W555-A2 (Classified SR-2) MS-7125 (K8N Neo4(-F/-FI/-FX/Platinum)) MS-9830 (IM-945GSE-A, A9830IMS) Fusion-ITX WiFi (FUSION350-A-E) nForce 630i Supreme (N73U-Supreme) GD25LQ128C/GD25LQ128D/GD25LQ128E MX25L12833F/MX25L12835F/MX25L12845E/MX25L12865E/MX25L12873F MX25L1605A/MX25L1606E/MX25L1608E MX25L1605D/MX25L1608D/MX25L1673E MX25L6436E/MX25L6445E/MX25L6465E/MX25L6473E/MX25L6473F MX25L8005/MX25L8006E/MX25L8008E/MX25V8005 S25FL128S_UL Uniform 128 kB Sectors S25FL128S_US Uniform 64 kB Sectors W29C010(M)/W29C011A/W29EE011/W29EE012 W29C010(M)/W29C011A/W29EE011/W29EE012-old unknown Winbond (ex Nexcom) SPI chip Chip status register: Block Protect 4 (BP4) is %sset Chip status register: Block Protect 3 (BP3) is %sset Chip status register: Block Protect 2 (BP2) is %sset Chip status register: Block Protect 1 (BP1) is %sset Chip status register: Block Protect 0 (BP0) is %sset Chip status register: Software Protection Status (SWP): Chip status register is 0x%02x. Chip status register: Block Protect Write Disable (BPL) is %sset Chip status register: Auto Address Increment Programming (AAI) is %sset Chip status register: Write Enable Latch (WEL) is %sset Chip status register: Write In Progress (WIP/BUSY) is %sset %s called, but SPI write chunk size not defined on this hardware. Please report a bug at flashrom@flashrom.org Lock status for 0x%06x (size 0x%06x) is %02x, Trying to clear lock for 0x%06x... Warning: Unlock Failed for block 0x%06x Block locking for W39V080FA in dual mode is undocumented. Resulting block protection : %s %s called, but SPI read chunk size not defined on this hardware. Please report a bug at flashrom@flashrom.org pre-rounding: start=0x%0*lx, len=0x%zx, end=0x%0*lx post-rounding: start=0x%0*lx, len=0x%zx, end=0x%0*lx %s: tried to physunmap without valid data! Trying to unmap a nonexisting mapping! Please report a bug at flashrom@flashrom.org %s: Tried to cleanup an invalid PCI context! Please report a bug at flashrom@flashrom.org %s: Tried to undo PCI writes without a valid PCI %s! Please report a bug at flashrom@flashrom.org Restoring PCI config space for %02x:%02x:%01x reg 0x%02x %s: File descriptor is invalid. Could not fetch original serial port configuration: Could not set custom baudrate: Could not fetch serial port configuration: Warning: given baudrate %d rounded down to %d. Using slowest possible baudrate: %d. Could not set serial baud rate: Could not change serial port configuration: Could not fetch new serial port configuration: Some requested serial options did not stick, continuing anyway. observed wanted c_cflag: 0x%08lX 0x%08lX c_lflag: 0x%08lX 0x%08lX c_iflag: 0x%08lX 0x%08lX c_oflag: 0x%08lX 0x%08lX Could not set baud rates exactly. Actual baud flags are: ispeed: 0x%08lX, ospeed: 0x%08lX Polling read events failed: %i %s! %s: failed to submit OUT transfer: %s %s: failed to submit IN transfer: %s Could not %sable output pins. Invalid writecnt=%i, aborting. Invalid readcnt=%i, aborting. Send SPI failed, expected %i, got %i %s! Receive SPI failed, expected %i, got %i %s! %s: Unsupported transfer length of %u blocks! Please report a bug at flashrom@flashrom.org Can't handle 4-byte address with dediprog. %s: Chunk sizes other than 256 bytes are unsupported, chunksize=%u! Please report a bug at flashrom@flashrom.org %s: Unaligned start=%i, len=%i! Please report a bug at flashrom@flashrom.org Command Write SPI Bulk failed, %s! SPI bulk write failed, expected %i, got %s! Cannot read SR2: unsupported by chip Cannot read SR3: unsupported by chip Cannot read register: unknown register Chip status register: Status Register Write Disable (SRWD, SRP, ...) is %sset Chip status register: Top/Bottom (TB) is %s Chip status register: Sector Protect Size (SEC) is %i KB Chip status register 2 is NOT decoded! Chip status register: Sector Protection Register Lock (SRPL) is %sset Chip status register: Erase/Program Error (EPE) is %sset Chip status register: WP# pin (WPP) is %sasserted Ignoring security lockdown (if present) Ignoring status register byte 2 Chip status register: Write Protect Enable (WPEN) is %sset Chip status register: Bit 6 / Block Protect 4 (BP4) is %sset Chip status register: Bit 5 / Block Protect 3 (BP3) is %sset Chip status register: Bit 3 / Block Protect 1 (BP1) is %sset Chip status register: Bit 2 / Block Protect 0 (BP0) is %sset Chip status register: Sequential Program Mode Status (SPM) is %sset Chip status register: WP# disable (WPDIS) is %sabled Chip status register: Program Fail Flag (P_FAIL) is %sset Chip status register: Erase Fail Flag (E_FAIL) is %sset %s: handle already set! Please report a bug at flashrom@flashrom.org Couldn't open device %04x:%04x. Cannot detach the existing USB driver. Claiming the interface may fail. %s Failed to claim interface 0: '%s' Failed to get device from device handle. Failed to get device descriptor: '%s' Device revision is %d.%01d.%01d Failed to alloc libusb OUT transfer Failed to alloc libusb IN transfer %d Could not configure stream interface. Using clock_gettime for delay loops (clk_id: %d, resolution: %ldns). Cannot write SR2: unsupported by chip Cannot write SR3: unsupported by chip Cannot write register: unknown register Missing status register write definition, assuming EWSR is needed Error: WIP bit after WRSR never cleared restoring chip status (0x%02x) Block protection is disabled. Some block protection in effect, disabling... Need to disable the register lock first... Hardware protection is active, disabling write protection is impossible. Could not write status register 1. Unsetting lock bit(s) failed. Block protection could not be disabled! Old Winbond W29* probe method disabled because the probing sequence puts the AMIC A49LF040A in a funky state. Use 'flashrom -c %s' if you have a board with such a chip. Software %d kB bootblock locking is %sactive. Software 64 kB bootblock locking is %sactive. Software 16 kB bootblock locking is %sactive. Hardware bootblock locking (#TBL) is %sactive. Hardware remaining chip locking (#WP) is %sactive.. Hardware bootblock lockout is %sactive. %s: %s after %d tries (access=0x%02x, status=0x%02x) ROM device with %s kB attached. %s: wp_verify reg:%u value:0x%x %s: wp_verify failed: reg:%u actual:0x%x expected:0x%x Not mapping %s, zero size at 0x%0*lx. Critical error: open(/dev/mem): %s Error accessing %s, 0x%zx bytes at 0x%0*lx In Linux this error can be caused by the CONFIG_NONPROMISC_DEVMEM (<2.6.27), CONFIG_STRICT_DEVMEM (>=2.6.27) and CONFIG_X86_PAT kernel options. Please check if either is enabled in your kernel before reporting a failure. You can override CONFIG_X86_PAT at boot with the nopat kernel parameter but disabling the other option unfortunately requires a kernel recompile. Sorry! %s: Could not register shutdown function! ERROR: Could not get I/O privileges (%s). Make sure you are root. If you are root, your kernel may still prevent access based on security policies. On OpenBSD set securelevel=-1 in /etc/rc.securelevel and reboot, or reboot into single user mode. On NetBSD reboot into single user mode or make sure that your kernel configuration has the option INSECURE enabled. Unknown PCI header type 0x%02x, BAR type cannot be determined reliably. I/O BAR access requested, but flashrom does not support I/O BAR access on this platform (yet). MEM BAR access requested, but device has MEM space accesses disabled. BAR type unknown, please report a bug at flashrom@flashrom.org %s: Tried to allocate a new PCI context, but there is still an old one! Please report a bug at flashrom@flashrom.org === This PCI device is UNTESTED. Please report the 'flashrom -p xxxx' output to flashrom@flashrom.org if it works for you. Please add the name of your PCI device to the subject. Thank you for your help! === Error: No supported PCI device found. Error: Multiple supported PCI devices found. Use 'flashrom -p xxxx:pci=bb:dd.f' to explicitly select the card with the given BDF (PCI bus, device, function). Found "%s %s" (%04x:%04x, BDF %02x:%02x.%x). Error: Invalid offset specified: "%s". Mapping addresses to base %p. Controller thinks there is no ROM attached. Could not get serial port mode: Could not set serial port mode to blocking: Can't handle raw bitbang mode version %c! Bus Pirate shutdown completed. Bus Pirate communication error! Protocol error while lowering CS#! Protocol error while reading/writing SPI! Protocol error while raising CS#! Protocol error while sending SPI write/read! No serial device given. Use flashrom -p buspirate_spi:dev=/dev/ttyUSB0 Invalid SPI speed, using default. Invalid pullups state, not using them. Invalid psus state, not enabling. Unable to allocate space for SPI master data (unknown version number format) Bus Pirate firmware 2.3 and older does not support binary SPI access. Please upgrade to the latest firmware (at least 2.4). Bus Pirate firmware 5.4 and older does not support fast SPI access. Reading/writing a flash chip may take hours. It is recommended to upgrade to firmware 5.5 or newer. Bus Pirate firmware 6.1 and older does not support SPI speeds above 2 MHz. Limiting speed to 2 MHz. It is recommended to upgrade to firmware 6.2 or newer. Bus Pirate v3 or newer detected. Set serial speed to 2M baud. Bus Pirate firmware 5.4 and older does not support custom serial speeds.Using default speed of 115200 baud. Increased serial speeds may not work on older (<3.0) Bus Pirates. Continue at your own risk. Unable to configure system baud rate to specified value. Can't handle raw SPI mode version %c! Protocol error while setting power/CS/AUX(/Pull-up resistors)! Protocol error while setting SPI speed! Pull-ups enabled, so using HiZ pin output! (Open-Drain mode) Protocol error while setting SPI config! Invalid serial speed %s, using default. Command Set LED 0x%x failed (%s)! Slow read for partial block from 0x%x, length 0x%x Command Read SPI Bulk failed, %i %s! Allocating libusb transfer %i failed: %s! Submitting SPI bulk read %i failed: %s! Page sizes other than 256 bytes are unsupported as we don't know how dediprog handles them. Slow write for partial block from 0x%x, length 0x%x Unknown voltage %i mV! Aborting. Setting SPI voltage to %u.%03u V Command Set SPI Voltage 0x%x failed! Could not release USB interface! Incomplete/failed Command Receive Device String! Device not a SF100, SF200, or SF600! Unexpected firmware version string '%s' Unexpected firmware version %d.%d.%d! Internal error: Unable to determine protocol version. Failed to read dediprog id, error %d! Could not find a Dediprog programmer on USB. Could not set USB device configuration: %i %s Could not claim USB device interface %i: %i %s %s: Mapping %s, 0x%zx bytes at 0x%0*lx %s: Unmapping 0x%zx bytes at %p %s: set flash->total_size to %dK bytes. %s: eraser.size=%d, .count=%d %s: addr=0x%lx, len=0x%zx, writing data (hex): %s: addr=0x%lx, returning 0xff %s: addr=0x%lx, returning 0xffff %s: addr=0x%lx, returning 0xffffffff ERROR: FDC37B787: Wrong ID 0x%02X. ERROR: GPIO50 mode 0x%02X unexpected. Warning: Flash interface in use by GPIO! Failed to read GPIO pins (%s) Error: Could not parse dediprog 'id'. Expected a string like SF012345 or DP012345. Error: id %s is out of range! Will search for dediprog id %s. Error: Cannot use 'id' and 'device'. Error: Could not convert 'device'. Error: Value for 'device' is out of range. Error: Garbage following 'device' value. Error: Could not convert 'target'. Error: Value for 'target' is out of range. Error: Garbage following 'target' value. FLASH_TYPE_APPLICATION_FLASH_1 FLASH_TYPE_APPLICATION_FLASH_2 Command Set Voltage failed (%s)! set_target_flash failed (%s)! Skipping to set SPI speed because firmware is too old. Command Set SPI Speed 0x%x failed! Failed to disable standalone mode: %s Error: Invalid spispeed value: '%s'. Reading the USB serialno failed (%s)! Failed to issue a command: '%s' Short write issuing a command Failed to get a response: '%s' Short read getting a response Response indicates incorrect length. At least part of the write range is write protected! %s: addr=0x%lx, len=0x%zx, returning array of 0xff At least part of the erase range is write protected! %s: failed to write data: '%s' %s: failed to read data: '%s' %s: response missing a write count %s: wrote only %d bytes instead of %d %s: response missing a read count %s: read only %d bytes instead of %d %s: couldn't initialize libusb! %s: couldn't open device %04x:%04x. %s: failed to claim interface 0: '%s' %s: unknown board '%s' not attempting a reset. Override with '-p digilent_spi=reset=1'. SPI speed set to %d instead of %d %s: Failed rxtx_buffer allocation %s: Failed to read SPI commands %s: failed to allocate internal driver data structure Invalid unit: %s, use hz, khz or mhz %s: Frequency set above DJTAG1 limits (%d kHz) %s: programmer speed set to %lu kHz %s: failed to configure DirtyJTAG into initialized state Dr. Kaiser PC-Waechter flash memory Unable to allocate space for PAR master data Refusing blacklisted SPI command 0x%02x Ignoring ignorelisted SPI command 0x%02x Forbidden opcode (0x%02x) attempted during AAI sequence! WRSR attempted, but WEL is 0! WRSR2 attempted, but WEL is 0! WRSR3 attempted, but WEL is 0! Max BYTE PROGRAM size exceeded! Initial AAI WORD PROGRAM size too short! Initial AAI WORD PROGRAM size too long! Continuation AAI WORD PROGRAM size too short! Continuation AAI WORD PROGRAM size too long! SECTOR ERASE 0x20 outsize invalid! SECTOR ERASE 0x20 insize invalid! Unaligned SECTOR ERASE 0x20: 0x%x BLOCK ERASE 0x52 outsize invalid! BLOCK ERASE 0x52 insize invalid! Unaligned BLOCK ERASE 0x52: 0x%x BLOCK ERASE 0xd8 outsize invalid! BLOCK ERASE 0xd8 insize invalid! Unaligned BLOCK ERASE 0xd8: 0x%x CHIP ERASE 0x60 outsize invalid! CHIP ERASE 0x60 insize invalid! CHIP ERASE 0xc7 outsize invalid! CHIP ERASE 0xc7 insize invalid! Wrapping the start address around the SFDP table boundary (using 0x%x instead of 0x%x). Crossing the SFDP table boundary in a single continuous chunk produces undefined results after that point. Invalid command sent to flash chip! Error: opening file "%s" failed: %s Error: file %s could not be written completely. Error: flushing file "%s" failed: %s Error: closing file "%s" failed: %s Enabling support for %s flash. Support for all flash bus types disabled. invalid spi_write_256_chunksize Invalid SPI command blacklist length Invalid char "%c" in SPI command blacklist Invalid SPI command ignorelist length Invalid char "%c" in SPI command ignorelist %s: invalid value 0 for freq parameter %s: Chip size is not a multiple of 1024: %s Emulated chip will have hardware WP enabled Emulated chip will have hardware WP disabled %s: size parameter is only valid for VARIABLE_SIZE chip. Not emulating any flash chip. Emulating ST M25P10.RES SPI flash chip (RES, page write) Emulating SST SST25VF040.REMS SPI flash chip (REMS, byte write) Emulating SST SST25VF032B SPI flash chip (RDID, AAI write) Emulating Macronix MX25L6436 SPI flash chip (RDID, SFDP) Emulating Winbond W25Q128FV SPI flash chip (RDID) Emulating Spansion S25FL128L SPI flash chip (RES, RDID, WP) %s: the size parameter is not given. Emulating generic SPI flash chip (size=%d bytes) Invalid chip specified for emulation: %s %s: erase_to_zero parameter is not valid for real chip. Emulated chip will erase to 0x00 Emulated chip will erase to 0xff erase_to_zero can be "yes" or "no" Error: initial status register specified, but the value could not be converted. Initial status registers: SR1 is set to 0x%02x SR2 is set to 0x%02x SR3 is set to 0x%02x Initial status registers: SR1 is set to 0x%02x SR2 is set to 0x%02x Initial status register is set to 0x%02x. Filling fake flash chip with 0x%02x, size %i Found persistent image %s, %jd B Error: getting metadata of file "%s" failed: %s Error: Image size (%jd B) doesn't match the expected size (%lu B)! Error: Failed to read complete file. Got %ld bytes, wanted %ld! Unable to set pins back to inputs. Unable to close FTDI device: %d (%s) Error: Invalid device type specified. Error: Invalid channel/port/interface specified: "%s". Error: Invalid SPI frequency divisor specified: "%s". Valid are even values between 2 and 131072. Deprecation warning: `csgpiol` is deprecated and will be removed in the future. Use `gpiolX=C` instead. Error: Invalid GPIOL specified: "%s". Valid values are between 0 and 3. Error: Invalid GPIOL specified: "%s". The pin is reserved on this programmer. Error: `csgpiol` and `gpiolX` are mutually exclusive. Since `csgpiol` is deprecated and will be removed in the future, use of `gpiolX=C` is recommended. Error: Invalid GPIOL specified: "gpiol%d=%s". Pin GPIOL%i is reserved on this programmer. Error: Invalid GPIOL specified: "gpiol%d=%s". Valid values are H, L and C. H - Set GPIOL output high L - Set GPIOL output low C - Use GPIOL as additional CS# output Unable to select channel (%s). Unable to open FTDI device: %d (%s) FTDI chip type %d is not high-speed. Unable to reset FTDI device (%s). Unable to set latency timer (%s). Unable to set bitmode to SPI (%s). Disable divide-by-5 front stage MPSSE clock: %f MHz, divisor: %u, SPI clock: %f MHz Detected NVIDIA I/O base address: 0x%x. Warning: Failed to enable flash write on "%s" Setting register 0x%x to 0x%02x on %s failed (WARNING ONLY). Setting register 0x%04x to 0x%04x on %s failed (WARNING ONLY). Could not find South-North Module Interface Control device! %s: Unsupported chipset %x:%x! ERROR: SMBus device not found. Aborting. ERROR: Intel PIIX4 PM not found. ERROR: NVIDIA MCP61 SMBus not found. ERROR: AMD SMBus Controller (0x4372) not found. ERROR: Intel PIIX4 ISA bridge not found. ERROR: PIIX4 GPO%d not programmed for output. Can not unlock existing protection in register 0x%02x. Unlocking protection in register 0x%02x... Could not unlock protection in register 0x%02x (new value: 0x%x). Could not unlock protection in register 0x%02x (new value: 0x%08x). %d locks could not be disabled, disabling writes (reads may also fail). Setting register 0x%02x to 0x%02x on %s failed. ISA/LPC bridge reg 0x8a contents: 0x%02x, bit 6 is %i, bit 5 is %i Flash bus type is unknown (none) Please send the log files created by "flashrom -p internal -o logfile" to flashrom@flashrom.org with "your board name: flashrom -V" as the subject to help us finish support for your chipset. Thanks. ERROR: SMBus device not found. Not enabling SPI. Found SMBus device %04x:%04x at %02x:%02x:%01x Error: Chipset is strapped for SPI, but MCP SPI BAR is invalid. SPI control is 0x%04x, req=%i, gnt=%i MCP6X bitbang SPI master init failed! Strange. MCP SPI BAR is valid, but chipset apparently doesn't have SPI enabled. AMD Elan SC520 detected, but no BOOTCS. Assuming flash at 4G. MCP LPC bridge at unexpected function number %d MCP SMBus controller could not be found Unexpected device class %04x for SMBus controller ERROR: no NVIDIA LPC/SMBus controller found. ERROR: NVIDIA MCP55 LPC bridge not found. Getting the USB device list failed (%s)! Reading the USB device descriptor failed (%s)! Found USB device %04x:%04x at address %d-%d. Opening the USB device at address %d-%d failed (%s)! Looking for serial number commencing %s Could not find a Developerbox programmer on USB. Found southbridge %04x:%04x at %02x:%02x:%01x BIOS Interface Lock-Down: %sabled, BIOS Prefetch Enable: %sabled, prefetching %sabled, caching %sabled, Warning: BIOS region SMM protection is enabled! Warning: Setting BIOS Control at 0x%x from 0x%02x to 0x%02x failed. New value is 0x%02x. invalid prefetching/caching settings, Error: Invalid ILB_BASE_ADDRESS Error: fwh_idsel= specified, but (yet) unsupported on this chipset. Error: fwh_idsel= specified, but value could not be converted. Error: fwh_idsel= specified, but value had unused bits set. Setting IDSEL from 0x%012lx to 0x%012lx for top 16 MB. Error: fwh_idsel= specified, but no value given. FWH IDSEL handling is not implemented on this chipset. 0x%08x/0x%08x FWH IDSEL: 0x%x 0x%08x/0x%08x FWH decode %sabled Maximum FWH chip size: 0x%x bytes Root Complex Register Block address = 0x%x Chipset %s%sprotected flash from 0x%08x to 0x%08x, unlocking... Disabling %s%sprotection of flash addresses from 0x%08x to 0x%08x failed. Trying to determine the generation of the SPI interface... , SpiAccessMacRomEn=%i, SpiHostAccessRomEn=%i, ArbWaitCount=%i No SMBus device with ID %04X:%04X found. , AltSpiCSEnable=%i, AbortEnable=%i SB8xx/SB9xx/Hudson-1 detected. SB device found but SMBus revision 0x%02x does not match known values. Assuming SB8xx/SB9xx/Hudson-1. Please send a log to flashrom@flashrom.org FCH device found but SMBus revision 0x%02x does not match known values. Please report this to flashrom@flashrom.org and include this log and the output of lspci -nnvx, thanks!. %s: Unknown LPC device %x:%x. Please report this to flashrom@flashrom.org and include this log and the output of lspci -nnvx, thanks! Could not determine chipset generation. , DropOneClkOnRd/SpiClkGate=%i ERROR: State of SpiAccessMacRomEn or SpiHostAccessRomEn prohibits full access. Error: Invalid spireadmode value: '%s'. Warning: spireadmode not supported for this chipset. Setting SPI read mode to %s (%i)... spispeed is not set, leaving SPI speed unchanged. Setting SPI clock to %s (%i)... Unable to allocate space for extra SPI master data. Missing argument for amd_imc_force. Unknown argument for amd_imc_force: "%s" (not "yes"). Writes have been disabled for safety reasons because the presence of the IMC was detected and it could interfere with accessing flash memory. Flashrom will try to disable it temporarily but even then this might not be safe: when it is re-enabled and after a reboot it expects to find working code in the flash and it is unpredictable what happens if there is none. To be safe make sure that there is a working IMC firmware at the right location in the image you intend to write and do not attempt to erase. You can enforce write support with the amd_imc_force programmer option. Continuing with write support because the user forced us to! Shutting down IMC successful. ROM strap override is %sactive spireadmode is not set, leaving SPI read mode unchanged. ERROR: IT8703F Super I/O not found. ERROR: Failed to read IT8703F Super I/O GPIO Base. Laptop detection overridden by P2 board enable. Unable to extract fd from flash context. %s called with unsupported readcnt %i. %s called with unsupported writecnt %i. AMD SPI FIFO pointer corruption! Pointer is %d, wanted %d Something else is accessing the flash chip and causes random corruption. Please stop all applications and drivers and IPMI which access the flash chip. AMD SPI FIFO pointer is %d, wanted %d W83627 not found at 0x%x, id=0x%02x want=0xa0. W83627 found at 0x%x, but SPI pins are not enabled. (CR[0x24] bit 1=0) W83627 found at 0x%x, but SPI is not enabled. (LDN6[0x30] bit 0=0) Hardware sequencing reports %d attached SPI flash chip There is only one partition containing the whole address space (0x%06x - 0x%06x). There are %d erase blocks with %d B each. The flash address space (0x%06x - 0x%06x) is divided at address 0x%06x in two partitions. The first partition ranges from 0x%06x to 0x%06x. In that range are %d erase blocks with %d B each. The second partition ranges from 0x%06x to 0x%06x. Expected south bridge not found ERROR: Intel 82801AA ISA bridge not found. ERROR: SMSC Super I/O not found. ERROR: Super I/O runtime interface not available. Odd. Board name "%s":"%s" matches, but first PCI device %04x:%04x doesn't. Odd. Board name "%s":"%s" matches, but second PCI device %04x:%04x doesn't. Board name "%s":"%s" and PCI IDs matched more than one board enable entry. Please report a bug at flashrom@flashrom.org Found candidate at: %08lx-%08lx Header bytes of %d are incorrect. Found coreboot table at 0x%08lx. Enabling eeprom access failed. %s: Winbond saved on 4 register bits so max chip size is 1024 kB! %s: unsupported command type wr=%d rd=%d %s, cmd=0x%02x, writecnt=%d, readcnt=%d Unexpected change in AMD SPI read/write count! Reading Status register failed !! Writing Status register failed !! Erase block size for address 0x%06x is %d B, but requested erase block size is %d B. Not erasing anything. Erase address 0x%06x is not aligned to the erase block boundary (any multiple of %d). Not erasing anything. Request to erase some inaccessible memory address(es) (addr=0x%x, len=%d). Not erasing anything. Erasing %d bytes starting at 0x%06x. Request to read from an inaccessible memory address (addr=0x%x, len=%d). Reading %d bytes starting at 0x%06x. Request to write to an inaccessible memory address (addr=0x%x, len=%d). Writing %d bytes starting at 0x%06x. Intel Gigabit NIC w/ SPI EEPROM Controller reports no EEPROM is present. Intel i210 NIC w/ emulated EEPROM Unable to allocate space for OPAQUE master data Error occurred when reading %s Cannot read 0x%06x bytes at 0x%06x: %s Cannot write 0x%06x bytes at 0x%06x %s: device does not support erasing. Please file a bug report at flashrom@flashrom.org %s: numeraseregions must be 0 %s: MEMERASE ioctl call returned %d, error: %s %s: Failed to disable write-protection, MEMUNLOCK ioctl retuned %d, error: %s %s: Failed to enable write-protection, MEMLOCK ioctl retuned %d, error: %s Invalid device number %s. Use flashrom -p linux_mtd:dev=N where N is a valid MTD device number. Unable to allocate memory for linux_mtd_data MTD device %d type is not "nor" MTD erase size is not a power of 2 Non-uniform eraseblock size is unsupported. %s: device_name: "%s", is_writeable: %d, numeraseregions: %lu, total_size: %lu, erasesize: %lu Cannot open file stream for %s Failed to set MTD device to unbuffered: %d Using default %ukHz clock. Use 'spispeed' parameter to override. No SPI device given. Use flashrom -p linux_spi:dev=/dev/spidevX.Y %s: failed to set speed to %uHz: %s %s: failed to set SPI mode to 0x%02x: %s %s: failed to set the number of bits per SPI word to %u: %s /sys/module/spidev/parameters/bufsiz Cannot read %s: file is empty. Buffer size %ld from %s seems wrong. %s: Using value from %s as max buffer size. %s: Using page size as max buffer size. Unable to allocated space for SPI master data Warning: Can't autodetect %s %s, DMI info unavailable. Please supply the board vendor and model name with the -p internal:mainboard=<vendor>:<model> option. Missing argument for boardenable. Unknown argument for boardenable: %s Missing argument for boardmismatch. Unknown argument for boardmismatch: %s Unknown argument for laptop: %s -p internal:mainboard: vendor="%s", model="%s" Missing argument for mainboard. Failed getting access to coreboot low tables. Failed getting access to coreboot high tables. Found coreboot table at 0x%08zx. coreboot table found at 0x%lx. coreboot header(%d) checksum: %04x table(%d) checksum: %04x entries: %d Warning: The mainboard IDs set by -p internal:mainboard (%s:%s) do not match the current coreboot IDs of the mainboard (%s:%s). Warning: Could not register DMI shutdown function - continuing without DMI info. DMI table is broken (bogus header)! DMI string chassis-type: "%s" DMI table is broken (chassis_type out of bounds)! DMI table is broken (offset out of bounds)! DMI table is broken (string portion out of bounds)! DMI chassis-type is not specific enough. W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect. Found ITE Super I/O, ID 0x%04hx on port 0x%x Active config mode, unknown reg 0x20 ID: %02x. Found Winbond Super I/O, id 0x%02hx Winbond Super I/O probe weirdness: Port mismatch for ID 0x%02x at port 0x%04x W836xx hardware monitor disabled or does not exist. W836xx Hardware Monitor at port %04x W836xx hardware monitor busy, ignoring it. W836xx hardware monitor vendor ID weirdness: expected 0x5ca3, got %04x Probably not a Winbond Super I/O W83 series hardware monitor device ID weirdness: expected 0x%02x, got 0x%02x Found ITE EC, ID 0x%04hx, Rev 0x%02x on port 0x%x. Warning: unexpected second chipset match: "%s %s" ignoring, please report lspci and board URL to flashrom@flashrom.org with 'CHIPSET: your board name' in the subject line. ERROR: This chipset is not supported yet. This chipset is marked as untested. If you are using an up-to-date version of flashrom *and* were (not) able to successfully update your firmware with it, then please email a report to flashrom@flashrom.org including a verbose (-V) log. Thank you! Skipping chipset enable: No supported buses enabled. OK - searching further chips. WARNING: No chipset found. Flash detection will most likely fail. Enabling IT8705F flash ROM interface write. IT8705F with very unusual settings. Please send the output of "flashrom -V -p internal" to flashrom@flashrom.org with "IT8705: your board name: flashrom -V" as the subject to help us finish support for your Super I/O. Thanks. Inconsistent IT8705F decode size! IT8705F flash data pins disabled! IT8705F flash address pins 0-7 disabled! IT8705F flash address pins 8-15 disabled! IT8705F flash write enable pin disabled! IT8705F flash chip select pin disabled! IT8705F flash read strobe pin disabled! IT8705F flash address pins 16-17 disabled! Maximum IT8705F parallel flash decode size is %u. Not enabling IT8705F flash write. No IT8705F flash segment enabled. DualBIOS: Invalid chip index requested - choose 0 or 1. DualBIOS: Previous chip index: %d DualBIOS: Chip selection failed. No IT87* serial flash segment enabled. Serial flash segment 0x%08x-0x%08x %sabled LPC write to serial flash %sabled Enabling LPC write to serial flash Error: it87spiport specified, but no valid port specified. Port must be a multiple of 0x8 and lie between 0x100 and 0xff8. Forcing serial flash port 0x%04x Overriding chipset SPI with IT87 SPI. Super I/O ID 0x%04hx is not on the list of flash-capable controllers. No suitable board enable found for vendor="%s", model="%s". No board enable found matching coreboot IDs vendor="%s", model="%s". Warning: The mainboard-specific code for %s %s has not been tested, and thus will not be executed by default. Depending on your hardware, erasing, writing or even probing can fail without running this code. Please see the man page (section PROGRAMMER SPECIFIC INFO, subsection "internal programmer") for details. NOTE: Running an untested board enable procedure. Please report success/failure to flashrom@flashrom.org. Enabling full flash access for board "%s %s"... ======================================================================== You seem to be running flashrom on an unknown laptop. Some internal buses have been disabled for safety reasons. You may be running flashrom on an unknown laptop. We could not detect this for sure because your vendor has not set up the SMBIOS tables correctly. Some internal buses have been disabled for safety reasons. You can enforce using all buses by adding -p internal:laptop=this_is_not_a_laptop to the command line, but please read the following warning if you are not sure. Laptops, notebooks and netbooks are difficult to support and we recommend to use the vendor flashing utility. The embedded controller (EC) in these machines often interacts badly with flashing. See the manpage and https://flashrom.org/Laptops for details. If flash is shared with the EC, erase is guaranteed to brick your laptop and write may brick your laptop. Read and probe may irritate your EC and cause fan failure, backlight failure and sudden poweroff. You have been warned. ======================================================================== 0x6c: 0x%04x (CLOCK/DEBUG) Warning: SPI Configuration Lockdown activated. %s: preop=%04x optype=%04x opmenu=%08x%08x on-the-fly OPCODE (0x%02X) re-programmed, op-pos=%d OPCODE 0x%02x has unsupported length, will not execute. Invalid OPCODE 0x%02x, will not execute. %s: Internal command size error for opcode 0x%02x, got writecnt=%i, want =4 %s: Internal command size error for opcode 0x%02x, got writecnt=%i, want =1 %s: Internal command size error for opcode 0x%02x, got writecnt=%i, want >=4 %s: Internal command size error for opcode 0x%02x, got readcnt=%i, want =0 %s: Addressed region 0x%06x-0x%06x not in allowed range 0x%06x-0x%06x %s: Internal command size error for opcode 0x%02x, got datalength=%i, want <=%i timeout, ICH7_REG_SPIS=0x%04x %s: Two subsequent preopcodes 0x%02x and 0x%02x, ignoring the first. Missing argument for ich_spi_mode. Unknown argument for ich_spi_mode: %s SPI Configuration is locked down. The Flash Descriptor Override Strap-Pin is set. Restrictions implied by the Master Section of the flash descriptor are NOT in effect. Please note that Protected Range (PR) restrictions still apply. 0x%02X: 0x%08x FREG%u: %s region is unused. FREG%u: %s region (0x%08x-0x%08x) is %s. FREG%u: %s region (0x%08x-0x%08x) has unknown permissions. Not all flash regions are freely accessible by flashrom. This is most likely due to an active ME. Please see https://flashrom.org/ME for details. 0x%02X: 0x%08x (%sPR%u is unused) %sPR%u: Warning: 0x%08x-0x%08x is %s. At least some flash regions are write protected. For write operations, you should use a flash layout and include only writable regions. See manpage for more details. At least some flash regions are read protected. You have to use a flash layout and include only accessible regions. For write operations, you'll additionally need the --noverify-all switch. See manpage for more details. Reading flash descriptors mapped by the chipset via FDOC/FDOD... %s: number of regions too high (%d) - failed NR (Number of Regions): %5zd FRBA (Flash Region Base Address): 0x%03x NC (Number of Components): %5d FCBA (Flash Component Base Address): 0x%03x ISL (ICH/PCH/SoC Strap Length): %5d FISBA/FPSBA (Flash ICH/PCH/SoC Strap Base Addr): 0x%03x %s: number of masters too high (%d) - failed NM (Number of Masters): %5zd FMBA (Flash Master Base Address): 0x%03x MSL/PSL (MCH/PROC Strap Length): %5d FMSBA (Flash MCH/PROC Strap Base Address): 0x%03x Component 1 density: %s Component 2 density: %s eSPI/EC Bus Clock Frequency: %s Read Clock Frequency: %s Read ID and Status Clock Freq.: %s Write and Erase Clock Freq.: %s Fast Read Clock Frequency: %s Dual Output Fast Read Support: %sabled Invalid instruction 0: 0x%02x Invalid instruction 1: 0x%02x Invalid instruction 2: 0x%02x Invalid instruction 3: 0x%02x Invalid instruction 4: 0x%02x Invalid instruction 5: 0x%02x Invalid instruction 6: 0x%02x Invalid instruction 7: 0x%02x %s: number of regions too high (%d). %s: number of masters too high (%d). FD BIOS ME GbE Pltf Reg5 Reg6 Reg7 EC Reg9 RegA RegB RegC RegD RegE RegF Descr. BIOS ME GbE Platf. BIOS %c%c %c%c %c%c %c%c %c%c ME %c%c %c%c %c%c %c%c %c%c GbE %c%c %c%c %c%c %c%c %c%c Enabling hardware sequencing due to multiple flash chips detected. Hardware sequencing was requested but the flash descriptor is not valid. Aborting. Enabling hardware sequencing because some important opcode is locked. Enabling hardware sequencing by default for 100+ series PCH. Enabling hardware sequencing by default for Apollo/Gemini/Jasper/Elkhart/Meteor Lake. Could not determine density of flash component %d. %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s %s FD IFWI TXE n/a Platf DevExp WARNING: SPI Configuration Lockdown activated. Enabling flash write access failed. %s: control register stuck at %08x, ignoring. serprog: requested mapping %s is incompatible: 0x%zx bytes at 0x%0*lx. Intel I210 Gigabit w/ SPI flash Flash is in Secure Mode. Abort. Unable to clear Flash Access Error. Abort Intel Gigabit NIC w/ SPI flash Intel 10 Gigabit NIC w/ SPI flash Warning: Flash seems unconnected. Raiden: Receive packet overflowed bytes_in_buffer = %zu max_read_length = %zu receive_index = %zu receive_size = %zu Total packetsize (%i) is greater than %i supported, aborting. Unexpected number of bytes transferred, expected %i, got %i! Raiden: Failed to disable SPI bridge USB: Failed to get device descriptor %sbus=0x%02x,address=0x%02x | %s USB: Failed to get device product string Error: cannot read from device (flushing stream) Error: NAK to a stream buffer operation Error: Invalid reply 0x%02X from device Warning: Automatic command availability check failed for cmd 0x%02x - won't execute cmd Error: cannot write op code: %s Error: cannot write parameters: %s Error: cannot read from device: %s Error: invalid response 0x%02X from device (to command 0x%02X) Error: cannot read return parameters: %s Error: cannot malloc command buffer serprog: Passing write-n bytes=%d addr=0x%x serprog: Error: cannot write write-n command serprog: Error: cannot write write-n data Error: could not transfer write buffer Error: could not execute command buffer serprog: Executed operation buffer of %d bytes Error: could not execute command buffer before sending SPI commands. Error: could not allocate SPI send param buffer. Could not flush command buffer. serprog: Output drivers disabled serprog: %s: Warning: could not disable output buffers %s addr=0x%lx returning 0x%02X serprog: Error: cannot read read-n data serprog: Warning: executed operation buffer due to size reasons serprog_delay used, but programmer doesn't support delays natively - emulating Failed to issue the %s command: '%s' Failed to get %s answer: '%s' Failed to set the NSS pin to low Failed to issue the STLINK_BRIDGE_WRITE_SPI command: '%s' Failed to send the data after the STLINK_BRIDGE_WRITE_SPI command: '%s' STLINK_BRIDGE_GET_RWCMD_STATUS Failed to issue the STLINK_BRIDGE_READ_SPI command: '%s' Failed to retrieve the STLINK_BRIDGE_READ_SPI answer: '%s' Failed to set the NSS pin to high Raiden: IN transfer failed received = %d status = 0x%05x Raiden: OUT transfer failed transferred = %d packet_size = %zu status = 0x%05x Raiden: Invalid write count write count = %u max write = %d Raiden: Invalid read count read count = %d max read = %d Raiden: Write command failed protocol = %u write count = %u read count = %u transmitted bytes = %zu write attempt = %u status = 0x%05x Raiden: Read response failed protocol = %u write count = %u read count = %u received bytes = %zu write attempt = %u read attempt = %u status = 0x%05x Raiden: Invalid write count write count = %u max write = %u Raiden: Invalid read count read count = %u max read = %u Raiden: Unexpected start packet id = %u Raiden: Bad Index = %u Expected = %zu Raiden: Unexpected packet id = %u USB-Blaster enable chip select failed USB-Blaster disable chip select failed Failed to open USB-Blaster: %s USB-Blaster set latency timer failed USB-Blaster set chunk size failed USB-Blaster reset write failed USB-Blaster reset read failed Could not set serial port mode to non-blocking: Could not restore serial port blocking behavior: Could not restore serial port mode to blocking: PC8736x: unexpected ID %02x (expected %02x) PC87360: invalid GPIO base address %04x ERROR: No supported Winbond Super I/O found ERROR: Found Winbond chip with ID 0x%x, expected %x ERROR: winbond_gpio_set: Invalid GPIO number %d ERROR: GPIO%d is not supported yet on this winbond chip ERROR: No IT87 Super I/O GPIO configuration found. ERROR: IT%02X does not allow setting GPIO%02u. ERROR: Failed to read IT87 Super I/O GPIO Base. ERROR: No known Intel LPC bridge found. ERROR: This Intel LPC bridge does not allow setting GPIO%02d Intel ICH LPC bridge: %sing GPIO%02d. ERROR: VT82C686 PM device not found. VIA Apollo ACPI: %sing GPIO%02d. ERROR: VT823x ISA bridge not found. ERROR: VT823x GPIO%02d is not implemented. Writing SR%d failed: failed to read SR%d for writeback. %s: empty needle! Please report a bug at flashrom@flashrom.org Please use flashrom -p ogp_spi:rom=... to specify which flashchip you want to access. Invalid or missing rom= parameter. Could not open device PICkit2! Could not set USB device configuration. Could not claim USB device interface Command Get Firmware Version failed! PICkit2 Firmware Version: %d.%d Command Set SPI Speed failed! Error: Invalid 'spispeed' value. Error: Missing argument for programmer type. Error: Invalid programmer type specified. Error: No valid device specified. Use flashrom -p pony_spi:dev=/dev/device[,type=name] No programmer compatible with %s detected. USB: Failed to get device list USB: Inspecting device (Bus %d, Address %d) USB: Rejecting device because %s = %d != %d USB: Failed to get device descriptor USB: Failed to get config descriptor Raiden: Failed to find devices Raiden: Failed to find one IN and one OUT endpoint found %d IN and %d OUT endpoints Raiden: Failed to find valid endpoints on device Raiden: Found IN endpoint = 0x%02x Raiden: Found OUT endpoint = 0x%02x USB: Failed to get current device configuration USB: Failed to set new configuration from %d to %d USB: Failed to enable auto kernel driver detach USB: Could not claim device interface %d USB: Failed to set alternate setting %d Raiden: Failed to claim USB device USB: Failed to get device descriptor. Raiden: Serial number %s did not match device Raiden: Serial number %s matched device Raiden: Failed to enable SPI bridge Unable to allocate space for SPI master. Raiden: Failed to transmit get config config attempt = %d status = 0x%05x Raiden: Failed to receive packet config attempt = %d status = 0x%05x Raiden: Target SPI bridge is disabled (is WP enabled?) Raiden: Packet is not a valid config config attempt = %d packet id = %u packet size = %zu Raiden: Unknown USB SPI protocol version = %u Raiden: Error configuring protocol protocol = %u status = 0x%05x Raiden: No usable device found. Error: iobase= specified, but the I/O base given was invalid. It must be a multiple of 0x4 and lie between 0x100 and 0xfffc. Non-default I/O base requested. This will not change the hardware settings. Using address 0x%x as I/O base for parallel port access. No baudrate specified, using the hardware's defaults. Error: Both host and device specified. Please use either dev= or ip= but not both. Error: Neither host nor device specified. Use flashrom -p serprog:dev=/dev/device:baud or flashrom -p serprog:ip=ipaddr:port Error: No port specified. Use flashrom -p serprog:ip=ipaddr:port Error: serprog cannot open socket: %s Error: serprog cannot connect: %s Error: serprog cannot set socket options: %s serprog: connected - attempting to synchronize Error: cannot synchronize protocol - check communications and reset device? Error: NAK to query interface version Error: Unknown interface version: %d serprog: Interface version ok. Error: query command map not supported Warning: NAK to query supported buses serprog: Bus support: parallel=%s, LPC=%s, FWH=%s, SPI=%s Error: SPI operation not supported while the bustype is SPI serprog: Maximum write-n length is %d serprog: Maximum read-n length is %d Error: Could not convert 'spispeed'. Error: Garbage following 'spispeed' value. serprog: Warning: Setting the SPI clock rate is not supported! serprog: Requested to set SPI clock frequency to %u Hz. It was actually set to %u Hz serprog: Setting SPI clock rate to %u Hz failed! Error: Initialize operation buffer not supported Error: Write to opbuf: delay not supported Error: Single byte read not supported Error: Read n bytes not supported Error: Write to opbuf: write byte not supported serprog: Write-n not supported Error: cannot allocate memory for Write-n buffer serprog: Maximum read-n length not reported Warning: NAK to query programmer name serprog: Programmer name is "%s" Warning: NAK to query serial buffer size serprog: Serial buffer size is %d Error: Execute operation buffer not supported Error: NAK to initialize operation buffer Warning: NAK to query operation buffer size serprog: operation buffer size is %d Error: could not enable output buffers serprog: Output drivers enabled serprog: Warning: Programmer does not support toggling its output drivers Error: No host specified. Use flashrom -p serprog:ip=ipaddr:port Error: No device specified. Use flashrom -p serprog:dev=/dev/device[:baud] Opening STLINK-V3 with serial: %s No STLINK-V3 seems to be connected with serial %s Could not find any connected STLINK-V3 The spispeed parameter passed with invalid format: %s Please pass the parameter with a simple non-zero number in kHz Connected to STLink V3 with bridge FW version: %d Your STLink V3 has a too old version of the bridge interface Please update the firmware to version 2.33.25 or newer of the STSW-LINK007 which can be downloaded from here: https://www.st.com/en/development-tools/stsw-link007.html Failed to calculate SPI clock prescaler Error: SCIP bit is unexpectedly set. SPI Transaction Timeout due to previous operation in process! Transaction error between offset 0x%08x and 0x%08x (= 0x%08x + %d)! Timeout error between offset 0x%08x and 0x%08x (= 0x%08x + %d)! OP Type Pre-OP Pre-OP 0: 0x%02x, Pre-OP 1: 0x%02x %s: SPI controller can not send %d bytes, it is limited to %d bytes %s: SPI controller can not receive %d bytes, it is limited to %d bytes Vendor ID: %.*s, part ID: %.*s Board match found, but nothing to do? SPIBAR = 0x%0*lx (phys = 0x%08x) %s: failed to send query command %s: failed to send whole packet Setting register 0x6d to 0x%02x on %s failed. Changed ROM decode range to 0x%02x successfully. Set ROM enable bit successfully. %s: unknown erase opcode (0x%02x). Please report this at flashrom@flashrom.org %s: invalid input, please report to flashrom@flashrom.org Tried to add a duplicate block eraser: %d x %d B with opcode 0x%02x. Block Eraser %d is already occupied. Block eraser %d: %d x %d B with opcode 0x%02x %s: Not enough space to store another eraser (i=%d). Please report this at flashrom@flashrom.org Reading the %s register failed! start=0x%08zx length=0x%08zx failed! flashrom has no probe function for this flash chip. === SFDP has autodetected a flash chip which is not natively supported by flashrom yet. The standard operations read and verify should work, but to support erase, write and all other possible features All standard operations (read, verify, erase and write) should work, but to support all possible features we need to add them manually. You can help us by mailing us the output of the following command to flashrom@flashrom.org: 'flashrom -VV [plus the -p/--programmer parameter]' Thanks for your help! === %s %s flash chip "%s" (%d kB, %s) mapped at physical address 0x%0*lx. PCI BAR2 (Flash/NVRAM) Control: Warning! Either the straps are incorrect or you have no flash or someone overwrote the strap values! Reserved bits in BBAR not zero: 0x%08x Setting BBAR to 0x%08x failed! New value: 0x%08x. Xilinx Parallel Cable III (DLC 5) @ (@ N@ ? @ @ @ @ p? B@\(2@ *@0 #@ @ @ . N Z Z Z Z L @ D H \ P T X dediprog_spi_send_command dediprog_spi_bulk_write dediprog_spi_bulk_read prepare_rw_cmd config_stream ch341a_spi_init ch341a_spi_spi_send_command enable_pins cb_in cb_out % K @B ` %& - g5 = serialport_config buspirate_sendrecv undo_pci_write pci_init_common pcidev_shutdown atavia_chip_readb atavia_chip_writeb atavia_ready physmap_common undo_physmap write_wp_bits probe_w29ee011 erase_chip_28sf040 register_spi_master default_spi_write_256 default_spi_read probe_spi_st95 spi_write_enable spi_write_register W { i 4 @ W ڎ ܆ۑ~Wc=݈,< , N N N @ @ @ @ N determine_generation enable_flash_vt_vx init_data dummy_init dummy_shutdown SFDP H k; R 6 'O dummy_spi_send_command dummy_chip_readn dummy_chip_readl dummy_chip_readw dummy_chip_readb dummy_chip_writen dummy_chip_writel dummy_chip_writew dummy_chip_writeb probe_variable_size dummy_unmap dummy_map dirtyjtag_spi_init dirtyjtag_receive dirtyjtag_djtag1_spi_send_command default_reset digilent_spi_init spi_tx_end digilent_spi_send_command get_max_kernel_buf_size linux_spi_init linux_spi_send_command get_mtd_info linux_mtd_wp_write_cfg linux_mtd_wp_read_cfg linux_mtd_erase read_ich_descriptors_via_fdo prettyprint_ich_descriptor_region prettyprint_ich_descriptor_master find_preop ich_spi_send_multicommand ich_hwseq_write_status ich_hwseq_read_status run_opcode ich_spi_send_command find_opcode R program_opcodes wbsio_check_for_spi wbsio_spi_send_command spi100_spi_send_command sb600_spi_send_command it8716f_spi_send_command (988888 99 9888 909 9@9`9p9P9CBBtBdBBBBBTBDB4B$BBABA? ------ -@@- ))$ $ **** *++@@+ ++++ s25f_legacy_software_reset spi_get_erasefn_from_opcode sfdp_add_uniform_eraser compare_id dirtyjtag_send check_readwritecnt sp_do_read_n extract_param s25fs_read_cr s25fs_write_cr $X $X @$X 9 L$X 9# P$X $X $X # $X $X $X @&H A&H 'H 'H 'H 'H (H (H (H (H (H )H )H )H )H )H )H :H :H :H :H b ? b |? serprog_delay serprog_chip_readb serprog_chip_writeb serprog_shutdown serprog_spi_send_command satasii_wait_done add_device ; ܳ D \ < t l , |H \ p L $ LT L l ( P d <x \ \, l@ |T <x \ \ |$ T , l ,P l , L0 \d L ,@ ,p < , , L Lx $! P! ! ! \! $" T" " " " |" L0# ,\# # L # | # ! $ *X$ L-$ |0$ 1% \2H% 2% <5% 5% |6& ,7P& 7& <8& 9& <C ' L<' M`' N' O' P' Y ( l[D( |[X( ]( ,]( ]( _( ` ) aD) Lbt) ,c) |c) c) d * ,d* d8* \e`* e* f* h* ,i* <i+ |i4+ jd+ kx+ \k+ Ll+ \l+ l+ l+ l, l$, l8, lL, o, Lp, r, ,r, \r - r0- rP- ,t|- u- v- x. y0. {X. {. |}. }. }. ~ / <~</ l~\/ ~|/ ~/ ~/ ,/ \/ 0 <0 lp0 0 0 ̇0 $1 T1 1 1 1 2 |42 <`2 <2 \2 2 3 L3 ̟`3 ܟt3 3 3 3 3 4 ,4 ,P4 |4 4 4 5 \,5 lX5 x5 5 |5 l5 6 <6 Ld6 ܫ6 |6 L6 $7 LP7 x7 |7 7 7 8 88 d8 L8 8 8 ܷ 9 |<9 L`9 9 9 9 L: H: p: |: : : (; X; \; ; ; \< 8< |h< < L< < = P= <|= = = <= > \@> l> > > > , ? 0? T? |? ? ? ? ? ? <? @ 0@ D@ X@ l@ ,@ L@ l@ ,@ A 8A hA ,A <A \A | B \ LB tB B LB B C HC ,pC lC \C C D 8D hD D D |D E $E HE LpE E E E L(F LF |F F F G HG !|G "G #G \'H )<H ,8lH 8H 9H AH lE$I |E8I ELI GtI HI II JI KJ K(J K<J LPJ lLdJ LxJ LJ LJ MJ \MJ MJ MJ NK ,NK lN8K NLK lOtK OK OK OK PK PK P L ,Q<L Q`L lRL SL ,TL TL U M |U@M VdM ,_M _M <`M |a N a0N ,bPN lbpN bN cN lcN cO g4O klO <lO oO \sO s P t<P tPP |udP LvP ܅P P ܘQ @Q Q ,Q \Q | R R @R llR ,R ܱR <R S ,<S LPS ldS ,S LS lS S S ̴ T T (T ,<T LPT ldT xT T ̵T ̷T lU @U ldU ܹU U U U <U LV ̻,V LTV V V ܽV V V \ W <W <`W W |W W W X X ,X ,@X <TX LhX X X X ,X LX lY Y ,Y @Y TY hY |Y <Y \Y |Y Y Y Z , Z <4Z LHZ \\Z LZ Z lZ [ L([ \X[ [ [ [ <[ \\ |$\ 8\ L\ `\ t\ \ <\ \\ |\ \ \ ] ,(] |P] x] ] ] ^ ^ ,^ @^ ,T^ <h^ L|^ \^ ^ ^ ^ ^ <^ \_ 0_ D_ <X_ l_ _ _ _ _ ,_ l_ ,_ L ` l ` 4` H` \` p` ` ,` <` L` \` l` |` a $a 8a \a a \a a a a lb 8b Xb |b b b b c @c pc |c ,c c d d (d <d ld d d d < d l e <e \e |e e < e e f <,f \f f f f \g Hg ,\g l g \ g g \ h 0h !Xh |"h #h #h $ i &Ti 'i ,(i l)i <*j L+4j ,`j \-j .j /j \1k ,68k 6lk 6k 7k ;k <k \>,l l>@l @pl _l al Lb m c0m e\m gm <km \lm vn xXn ܜn |n ܟn o l o 0o Do Xo ̠lo ܠo o o ,o Lo lo o ̡ p ,p Lp ,lp Lp lp p p ̢ q ,0q lPq pq q ,q lq q | r LPr pr lr r r $s \Ls |s s <s s ̰s t ,$t <Tt ||t t ̴t t ܷ(u |Lu ,tu u u u v <Lv tv v v w 4w \Xw w w w x 8x <`x x x x y @y py |y y y z <,z \z z Lz ,z { ,D{ \ |{ { { | l 8| L| |"|| %| %| &$} L'\} (} )} \*} +~ +@~ |,l~ L-~ -~ / /$ l0P <2 3 3 l4 L6 9@ ?p @ DЀ zR x $ 0 FJ w ?9*3$" D \ ( t _ AC BH K İ EO F İ @ 0 < AC DLz B K A ( AC DFd F H , \ ( p $ $ F EC BEHm $ HB EC DDq $ pE EC BEGm $ B EC DDq , $ Q JF BEFDk D , T Q JF BEFDj E , EC BIH3 B EC H ( wC ED EH $ q EH E^ $ ( \s EC Gc P d `n x , T^ JC BDn G H H 0 JC FD~ K Z F$ a JC BDxEA , ( @ $ T EC A x EZ BH $ EC BIb K , 0R EH Iy A , ` EH BN C , $ P? EC BN K ( T `g AR BIc G ^ $ ET C B l| EJ Ak , K EC BPH| B z AQ EX A , D EC DGHE H , P ~ AG DFID H , $ EJ EB Z a G a , EJ EB Z a G a , D EJ EB Z a G a _ yZ K 0 0 EK CZ C { E ` H , d EF M G $ E[ CH E , ( AC I D | AH Ad B , EC Mj A , @ EC M A , p EC BLFDk E $ EC G J , \r EH I J $ z EI r H [ E ( EH K D ( L h AC DD] G x Z AC Ap [ f EC A\ ( T AC M~ A 4 AC FJs I m A S ( $ AC M H 0 P t# AC M E w A 4 p cF DGK D p 4 X3 AC DEJ| A 9 C , `W EC BGEH F , $ EF FJ+ J 0 T 0 AC M A v A ( m EC DDJ A ` 0 RC p K X H Y G 0 x EC BEEEHf I v ( 0 EE DL , \ EC DL A , 8r EE FED I 0 $ EC I A v , Q EE FEG< H 4 > EC DEM% E r F , X / EC HGj G , / EC HGj G T D EC BD[ G Y G Y G Y G Y G Y G Y A Y 4 SC BEGA K V A 4 H SC BEGA K V A , d N AC HDH H 0 XJ BJDQ E L A 0 XJ BJDQ E L A 4 \ WC BHD] K V A 4 P WC BHD] K V A LU EH A` A , EC BEEEMq A , (- AC P A , ( EC Pc E < % AG M H ` T&B EE BIl ( & EM JDJ F , d' AC DLe G ( ( EJ I E 4 x1 AC BKJx E I D 3 $ X 3 EH BH F 4 $ 4 EC Az E | , 4 ET FIH! G , 6 EC EC H $ 7 ET Iz D , D @8 AC DJEH A ( t 8 AG BEH I 9J iU K 9J iU K 9J iU K : : EH Es A $ 8 : EL Cf A $ ` : EL Cl A l; EC H , l; EC DIEK H =] EP CD (> $>9 JC A` , 4 @>\ EM DET E d p?9 x ?; $ ? EC I F @ @3 EH A\ @ @ @ $ @ 8 @ 0 L @ EC FDO G g A , B4 EC EL G t D 0 C EC FDN H F 0E ,E( HE1 JC AW 0 dE_ @S K ( P E# EH DK D , | F EH DLD E ( H EC DI B ( I EG BF A ( J EG BEH D $ 0 K EC BE} D 0 X L AC BDq E V J r F , HM AL BEIEK B N' ER O N' ER O N' ER O N' ER O < N' ER O \ O' ER O | O' ER O (O' ER O 8O* EU O HO* EU O XO* EU O hO* EU O 0 < xO EC BEEEu B Q 0 p O EI BEEED B $ PR AC BDk K , R AC BGEDg C $ V EO BDz D , $ `W EC EC H n J , T 0X EC DOk J , ` EC DEJq D , ` EC BEJEKx G , c EC BLH H iS EK g I ( 4 @i EC DED E , ` i EC DGH E 0 j EF BS F j k] EG K A $ kS KC BDw E 8 l MC BEEEHZ E P A L hl ` dl t `l \l EC C ll 4m 0 @m ET BDs F _ I V m AC A [ , na AL AN ( P n AL BIIH ( | ho EQ KU J pB aU K 8 <p AE BEHg D b F b F b $ qK PC BDh G ( , (q EC M K X r" EQ K $ x rH EC ET G _ Dr EM MM D ( r EM S F tsw EM M B $ s EM Oj E $ < Xt EM Oj E , d t EL A} A W I Y , @u EC DEMa A 4 u EC Mf E j F P $ HvY EC DIC ( $ v EC DEM| $ P v\ EC DIF ( x ,w AC HD ( wz EC Ei J a G $x EC Q G x EE H ! xL EJ M T [ ( 8! x EC Ee F v B ( d! y8 AC N E $ ! }^ EE EZ G m $ ! }^ EE EZ G m ( ! $~ AC M B , " ~ AC P D <" 8 AH EW K , `" EC M A $ " t SE C A 4 " EC DEGD D b F $ " AF G I , # , AE P{ G $ H# EC BH H , p# t EH Q` A , # Ԓ9 EH Q A ( # EH Q A ( # ؔ EH Q A , ($ 9 EH Q A , X$ ? EH Q A , $ ̗R EH Q. A , $ M EH Q) A $ C EL Al , % L EH Q` A , 8% EH Qa A , h% EH Q_ A , % l9 EH Q A ( % |{ EH OY A ( % Р EH Q A , & H EH Q$ A ( P& Ģ EH Q A ( |& EH LH} B , & ,/ EH Q A & ,% ( & Hk EH DK D $ ' EC G E ( @' EC DJ A $ l' EC KD I ' @7 , ' l EC t L P H R A $ ' P EC EY J _ , ( $r AC DGH G 0( t: EE BI` , T( AC DPD D ( ( ( ( ( ( , ( 8B EL A\ ) h 0) t D) X) l) ) ) $ ) EC Cg F , ) T EC CO F o A 4 * Դ EC IP G F , 8* ' AC HI D , h* EH E G V , * EH E G V ( * l EH BIIF ( * ` EH BIIF ( + T EH BKH $ L+ u EC FDb ( t+ ` EH BIID $ + EH BILh $ + | EH BILh ( + EH BIID ( , EH BIID $ H, L EH BILh p, = EH o , , AC BEFA F ( , ES BL| F M $ , ( EO C I - EE A{ J , 8- \ EE FF E , h- EC M G ( - 0 EO A D k E , - EC HH~ J - . " EN $. EH Ee I $ H. \ EH Ed J W , p. EC FK D , . T EC BGIEEu G ( . EC BGI A ( . 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EE Eo 7 \E EM BKa $ 7 c AC A D Z , 8 EI BHF C 4 48 EC DN[ K A l8 x G EE A{ , 8 EC FEJ E , 8 { EH HM F 8 h#1 EH Ab , 9 # EO Im F E <9 X$ P9 d$ d9 % AC E A , 9 % EC M% F ( 9 5 ES IO H , 9 62 EH DT( C ( : G EJ BEG{ H < @: H EC M D H Y A , : K EJ I> J : t\0 EH Aa , : \ EO Im F E ; t]8 EC An ; ]8 EC An ( @; ]d EC BIU H s ( l; ] EC BK] F $ ; ^ EC Aq F o $ ; _` EC BIg A ; L_X EC AN , < _ EC AU B P H V << _ P< _ ( d< ` EJ FD} A < ` EC H < ` < ` < ` < ` = ` = ` (= ` <= ` P= ` d= a x= a = a EK F @ = a EC BEJI N k E d L j F $ = b EH BIe A $ > Lc EM V A V A @> ce EM Ev A d> de EM Ev A ( > Ld AC DI A > 0e > ,e > 8e > De $ ? @eu EM } A T A $ ,? eu EM } A T A ( T? e EC E~ E Z F ( ? f EC Ep C Z F ? g ? g ? g ? ,g; EC BFa , @ HgP EC DGPT I <@ hi EC BDs < `@ il EC DED D Z F G $ @ m EC C~ G @ m @ m @ m A m A m ,A m @A m TA m hA mM EH i J ( A nl AC BJM G A Po A Lo A Ho A To B `o B lo ,B xo @B o TB o hB o |B o B o B o ( B o EJ ER J u A B p B p C p C p 4C p HC o , \C o EC HLV F $ C qi EC C C ( C s EC BJLJ F C ss EC Ab A D sX EC AG A , (D t EC HH] K , XD v EC DEJ F , D |zx AC HD F , D AC DEN D D , D 8 E D $E P 8E \ LE h `E t tE E E E E E E ȁ $ F ԁH EH AU E Q $ (F H EH AU E Q $ PF $H EH AU E Q $ xF LH EH AU E Q , F t EC FEPH E 0 F EC BKID F G З G ܗ ,G ؗ @G ԗ TG З hG ̗ |G ȗ G ė7 G G G ! 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EC Mq J `S $ EG E ( S 6 EC M G ( S , EG M D ( S EC Ki D , T L EJ Pq H 0 8T EC BEGHe E P lT X T d' EC A] , T t EJ HH J ( T AC DK E , T EC MW D ,U ( , @U $M EC FF1 K ( pU D EJ P K 8 U ( EC BO E f J ` $ U [ EH Ee I Z , V D EE BIJK1 E ( 0V EE BLJ O ( \V E_ II J , V <l EE DEEL G ( V | AE BER F , V pv EC DEEHf D @ W OC FD C C , XW l $ EI BQR E 4 W L. EF FFE D N J 0 W /R EO In E E W 03 X 1I X H1 0X T1 DX `1 XX \1 lX X1 X T1 X P1 X \1 X h1 X t1 X 1. X 1) Y 1 HF Q ,Y 1 EC H LY 1 EC H lY 1 EC H Y 1 EC H Y 1 EC H Y 1 EC H Y 1 EC H Z 1Q AI j D P 0Z 17 EL Ad PZ 2> EL Ak pZ 425 EL Ab Z T2< EL Ai Z t26 EL Ac Z 2< EL Ai , Z 2 EC DEDr A z , [ T3 EC DHh A I P[ 3B Y` H $ p[ $4 EO I E , [ 56 EO C E Y F , [ 6 EC E_ D E ( [ 7h AC Cy H _ $ $\ 7\ AH BEHC , L\ 8 EC HI0 A $ |\ ; ES C E \ `<% \ |<l EH AM E \ < \ < ] <> EC At , $] = EM BJ F \ $ T] =@ AC L H $ |] >z AC AV E S ] P? AC E F , ] ? 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( 1 : C L X \ c k v ' 2 = 2 I 2 O 2 W 2 ` 2 i 2 s 2 y 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 " 2 + 2 3 2 ; 2 A I R X _ h p # > V l ! : O e { 5 M a k z X 0 ; x F W G{/ H{/ v p4 {'2{d v b q q v j v ' q q n v ' ${x%{ v g 0){dC{ v @6 0){g{ v @6 P { R { v `4 i{ `{ v `4 { ` { v 4 {& `{& v 05 W0 v h W0 v v h Z0 Z3M0 g "kt "`t T Z 1 w1w1H1H1 ` i " " P) " " P) '2'2 g *>(> p6 |' ' g 'pr'pr i 'pr'pr i 'I''I' @6 "6I6"xIx# 0 i 9AIA9UIU= 9AIA9UIUF $I$$I9 8 g p%Ip%$I$ g ` CC M n t 1Ce0C M t w1C2C M w1C2C M 1Cw1C M h 0CG1C M h 1Cw1C M t rC<&*wC<&* M P % 'C'CX M ] pg `<4*d<4*b M P4 `<>*d<>*j M P4 dCĆ M 2 eC)Cs M g dC`C M P4 6C2CI M ] `2 $ $Ci} M g q q M m 0' q q M 0' qC$q M $ 0C%K$M M 6 0CpK$C( M 6 0C$C M 6 `%< *$<* M 6 $Cx%C M 6 p%C$C M 6 p%C$C M 6 p%C$C M 6 p%C$C M 6 p%C$ M 6 p%C$C M 6 9QC9b M 6 p%CZ$C M = g 9aC9UC M , A 3 M E 'C)C M f p6 j&Ch&CN M z 6 j&Ch&CN M 6 j&Ch&CN M 6 j&Ch&C= M 6 j&Ch&C M 6 j&Ch&C=) M 6 j&Ch&C=3 M 6 j&Ch&C= M 6 '<"*p'<"*; M N pg 'C"*p'C"*E M e pg 'Cy'CyO M * @6 'Cy'CyW M 0 @6 'Cy'Cyb M 9 @6 'Cyp'Czm M B @6 0 CC M @5 `ClC{ M t `ClCI M t $Cp%CW M 6 'Cy'Cy M @6 C$C'0C' M 6 C$C'0C' M 6 "xC7" xC7 M i Y0aAe0 w1w111 >((* i U( q $ ( 5(l 0 (l 1 g 11w1w1 [ 9%c9 ~ i && ~ @% 80 w1 ~ w1w1Y00 } ^ P } 4 ^ P } 4 9X } 5 q q } `' [ d[ p4 @*4H0)4H" $ ) i C$B$007 k g X0X k p%Xp%$ > k g K$B$E$X k g $X$$XP k g 9P9P9pXJ k ) ps 9Q9Q9pXPY k 8 ps X PaXP k 5 lX`XP k 5 X X k 4 P X ^ X P k `5 $<P <G K h h f#< 2x<>p e h K f#< 2H<1 e q K %<*@&< * K P6 $<I <F K Ph 0<0C$<@$z K 6 i<d< e K 4 ' ' 4 7 g fG^Q% = A P 9U 90c V { 'ֆp'֎ v i q q ' "ht "`t 1 3Se0Y0q " '''' ) 1 h ) 0) i ) 0) i ) 0) i " !U ! i ' ' i ' ' % i ) 0) 5 6 i ) 0) D E i ;f!0;g!S T i " !O ! b i n i " !U !| } i ' ' i ) 0) E i $$%qe a g t n r i q q z @' K$b9B$b9 z g 9E 9 z `%bpW$bpW z 1 b Yw1 z 2 '2'2 z 2 qb qe0b q z M 2 H1 w1 z \ $bxp% z g 9pbP 9%cbX z v ps bP bP z 5 b b z 5 X&bFpD0bm z `6 I1bap'2 z ^ b%qR b%q z p4 ^ b5qP b5q z @2 pbrdbr z 5 p4 `bPrhbPr z ) p4 UUq p 0;%y ;%y; K X i TTU U f l q l x i $M%PM% c k 6 0 t0 } 18Y0c 80% 4X0 v h dvfivf 5 80% 4 X _ #1#1Y0aA h p ` qW1$ 6 vvY0$ Y'2 p2 w1#1 k 2 Y'2e0I1 p2 4 @ ` @ ` @ @ ` | @ @ ` | ` | ` | ` | ` | ` | m @ ` @ ` @ ` @ @ ` , @ ` 8 @ ` D 7 @ ` P > @ ` \ O ` g 8 ` r w 7 0 9 ^ r 7 0 9 ^ r 7 0 @ 9 ^ r 7 0 @ @ @ p @ ? _ r 7 0 9 ^ r 7 @ @ 08 ^ r 7 @ @ 08 ^ r 7 0 9 ^ r 7 ! @ 08 ^ r 7 @ 08 ^ r 7 % @ p 9 ^ r 7 @ p 9 ^ r 7 " @ 08 ^ r 7 @ 08 ^ r 7 @ 9 ^ r 7 @ 9 ^ r 7 0 @ 9 ^ r 7 @ 9 ^ r 7 @ @ @ @ p @ ? _ r # 7 @ p ? _ r + 7 @ p ; _ r 3 7 @ ` | r ; 7 @ ` | r C 7 ` | r K 7 U [ C @ p A `_ U e C @ p A `_ r U p D p A `_ U { E p A `_ @ U E p PB _ U F @ p PB _ U G @ @ p @ A `_ U G @ @ p @ PB _ U H p PB _ U E p PB _ r U F @ p PB _ r U @ p PB _ U ` B _ U c B _ U d PG _ U ` @ B _ U e @ 0D _ U e @ p E ` U f P p H 0` U " f p J P` U , p 0 ^ U 6 p 0 ^ U @ @ p < @_ U K @ p 0 ^ U U @ @ p @ 0 ^ U _ B @ p 0 ^ U j D 0 U t E p K `_ U F @ p A `_ U F @ p K `_ U p 0 U ' | U ' | U ' | U ] @ ' | U ) B ! ? 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Q @ 0T K pJ U ( R pS Q 0T K pJ U & pq | U 2 @ @ U < @ ` | U H @ ` | U U pq | U ^ pq | U g # pq | U p ' pq | U z @ B U @ B U @ B h @ @ p 9 _ h @ @ p 0 P` @ ` | 1 @ | `] J 9 _ J 9 _ J 9 _ p 0 ^ $ @ @ p @ = ^ - @ ` | 7 ; @ @ 0 ^ 7 C @ @ 0 ^ 7 L @ 0 ^ 7 T @ 0 ^ 7 ] @ 0 ^ 7 e @ 0 ^ 7 n @ 0 ^ 7 v @ 0 ^ 7 @ ? @ 0 ^ 7 ? @ @ 0 ^ 7 @ 0 ^ 7 @ 0 ^ 7 @ 0 ^ 7 @ 0 ^ 7 @ 0 ^ 7 @ 0 ^ 7 1 @ p 0 ^ 7 1 p 0 ^ 7 1 p 0 ^ 7 1 @ p 0 ^ 7 1 @ @ p @ 0 ^ 7 1 p 0 ^ 7 1 p 0 ^ 7 1 p 0 ^ 7 @ 0 ^ 7 0 ^ 7 0 ^ 7 0 ^ 7 # @ @ 0 ^ 7 + 0 ^ 7 3 0 ^ 7 ; 0 ^ 7 C 0 @ p 0 ^ 7 L 0 p 0 ^ 7 T 0 @ @ p @ 0 ^ 7 a 0 p 0 ^ 7 i 0 p 0 ^ 7 q 0 p 0 ^ 7 | p @ p ; _ 7 p p ; _ 7 p @ @ p @ ; _ 7 p p ; _ 7 8 p 9 ^ r 7 8 @ p `L _ r 7 8 @ p 9 ^ r 7 8 @ @ p @ `L _ r 7 8 p 9 ^ r 7 8 p `L _ r 7 8 p 9 ^ r 7 @ ` | 7 @ ` | 7 @ ` | 7 ~ ` 7 ~ ` 7 ~ ` 7 + ! @ ` 7 5 O ` 7 B M S 1 @ p `> _ M \ 1 p `> _ M d 1 @ p `> _ M o 1 p `> _ M z @ p `> _ M @ @ p `> _ M @ @ @ p @ `> _ $ { @ ` | $ w @ ` | $ $ @ ` $ # ( @ ` $ I 0 @ $ 0 @ @ @ p < @_ ` @ p < @_ ` @ p < @_ ` @ @ p @ < @_ ` p < @_ ` p < @_ " ` p < @_ + @ p < @_ 3 @ @ p < @_ G @ @ p < @_ R @ @ p < @_ ] @ @ p ; ^ q @ @ @ p @ < @_ | @ p < @_ @ @ p < @_ @ p < @_ @ p < @_ 1 p 0 ^ B @ p < @_ B @ p < @_ B p < @_ B p < @_ B p < @_ e p < @_ r 4 @ ` @ ` ` | ` P p ^ ` @ P p ^ ) ` @ p ^ 3 p P @ @ p @ ^ r = p P p ^ r G p @ P p ^ r Q p @ p ^ r [ ~ ` f ~ ` s ~ ` ~ !~ @ ` O ` O ` @ @ O ` @ @ O ` O ` O ` B | B | | @ B y @ B x @ B + B E : q @ B N p @ B b B l B t } @ t t t t p 08 ^ t @ p ; _ t Ȑ @ p ; _ t p 9 ^ t p ; _ t 0 p ; _ t $ p ; _ t % p ; _ t @ p 08 ^ t @ p ; _ t @ @ @ p @ 9 ^ t ' @ @ p @ ; _ t = @ @ @ p @ ; _ t S ^ @ @ p @ ; _ t ^ @ @ p @ ; _ t t p 9 ^ t @ p 08 ^ t " @ p 08 ^ t p ; _ t p ; _ t p ; _ t X p ; _ t p ^ t p 9 ^ t ( @ @ p @ ; _ r t ( p ; _ r t 8% @ p ; _ r t 5% @ p ; _ r t 9% @ p ; _ r t 6% @ @ p @ ; _ r t - :% @ @ @ p ; _ r t 9 7% p ; _ r t F 4% p ; _ r t Q ` | t [ ` | t e 4 @ ` | t r @ ` | t 7 @ ` | t 6 @ ` | t ` | t !~ @ ` t ~ ? ` @ t ~ @ ` @ t ~ ? ` @ t ~ ` t ~ ` t ~ ` t O ` t @ @ @ p ; _ t @ p ; _ & 8 @ ; _ & ? @ ; _ & H ; _ & O ; _ & X @ @ ; _ & ` ; _ & g 08 ^ & n 08 ^ & y @ @ ; _ & ; _ & ; _ & ; _ & ; _ & 0 ^ & 0 ^ & @ 0 ^ & 0 ^ & 0 ^ & q 9 _ & q @ @ 9 _ & q 9 _ & q 9 _ & @ & @ & @ & @ & @ & ! @ M p` & ! @ M p` & ( @ M p` & 0 @ @ M p` & < @ @ M p` & H M p` & T M p` & ` @ M p` & l @ M p` & x @ M p` & @ M p` & @ @ @ M p` & @ @ @ M p` ! @ M p` ! @ M p` " @ M p` " @ M p` @ p M p` @ p M p` @ p M p` @ p M p` @ @ @ p M p` @ @ @ p M p` @ @ ` | @ @ ` | ) @ ` | 4 @ ` | ? @ @ ` | J @ ` ` | U @ ` | ` 0 P p ; _ ` 0 p ; _ ` 0 @ @ P p ; _ ` 0 P p ; _ ` 0 p ; _ k o ! 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