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H _ fH _ fH _ fH X_ fH /_ fH _ x H ^ ` H ^ H H ^ 0 H \^ H ,^ H ] H ] H \ H5Y 1 L%Y z L H\ 1^ H hY f% 0t0H `Y f= t#H XY f= tf= 0H 2X H"X HDL-Y H\ L1 H X f% t0H Y f= t#H Y f= tf= H W H HDHI\ L 1 H<\ 1f L L H'\ 1r H/\ 1fL S H"\ 1fL 4 H\ 1fL H\ LfHe 1[A\A]] @ H Z H5X 1 L%+X HZ 1f H5X HZ 1f L z HZ Lgf H $Z H5W 1 A H Z 1f H5Y H' H={ HDH5 HDHz HDL _{ LDL6{ LDH a HDHPPPPPPPPPP1W VH5uk RHY HpHe[A\A]]f 1DEH X H5V ] ˿ 1L%V HX L: HX 1fL ML HX 1 MHX H5X 0H W H5 V 1 H T f?v6H T f% f= @t#H T f= tf= H T HT HDL-.V Hj L1` H T f% 0t0H T f= t#H T f= tf= 0H 4T H$T HDHV L 1L%mU HV 1f L HV 1f L H T f% t0H ,T f= t#H T f= tf= H S HS HDHV L 1qHV 1fL RH~V 1fL 3H S f0t0H S f t#H S f0tfH S H S HEH,V L 1H }S f t0H S ft#H S f tfH `S HR HEHU L 1H R ft#H jS ftfH lS H HDHU HeL 1[A\A]]9f H T H H T 0 H T H5+S 1 L%CS L-S HS 1fL HS 1fL L HdQ H [ HEHS 1jHS 1fL KL HN H P HEHS 1 HS 1fL H P ft#H P ftfH P HP HDHnS s D 1H Q 1H5Q L%R L HQ 1HQ 1fL L-R [HQ 1f L <HQ 1f L L HO H Z HEHQ 1L HPM H O HEHkR 1H O f% t0H O f= t#H O f= tf= H O HO HDH+R L 1rH4Q 1fL SH/Q 1fL 4HQ 1fL L HsL H N HEHP 1HP H5P f DƃwH HcH>H N 1H5O @ H O 1ҿ 1H5O t @ H P H5O 1 QH Q H5{O 1 1H P H5[O 1 H Q H5;O 1 H Q H5O 1 H Q H5N 1 H R H5N 1 H R H5N 1 qH R H5N 1 QH R H5{N 1 1H R H5[N 1 H R H5;N 1 H R H5N 1 H R H5M 1 H R H5M 1 H R H5M 1 q UDHAVAUATSH:wDH HcH> H 0L HeH5bM 1[A\A]A^]WH L @ H .W H5+M 1 L%CM H W 1fL HW 1f L HW 1fL } HW 1fL ^ HW 1fL ? H AR f f4 Ha HcH>H 'V H U H M H qM H Q H5K 1 L5P L%P fL IIL-%L HQ 1L\@LLIDHQ 1L%K 5L HeP H x HEHQ 1 H4L 1fL H1L 1fL L HI H S HEH L 1HL 1fL L HF H -I HEHK 1WHK 1fL 8H I ft#H HO ftfH I HI HDHK LHe 1[A\A]A^]f D 1H J 1H5J L%&J L HI 1HJ 1fL L-8J {H J 1f L \L H+H H GR HEHI 11L HE H G HEHJ 1H G f% t0H N f= t#H G f= tf= H G HG HDHjJ L 1HN 1fL HnI 1fL sHI 1fL QHNI H5SI He 1[A\A]A^])f H R H G H Q H F H Q H5G 1L%G 1fHQ L {HP 1f L \HO 1f L =HN 1f L HP 1f L HP 1f L L HP 1HO Lfk @ H P H O H5F 1 qH NE f?v6H FE f% f= @t#H >E f= tf= H @E H0E HDL-F HG L1L%rF L HgB H D HEHG 1HN 1f L HN 1f L L HoD H N HEHF 1uHN 1fL VL HBK H AK HEHlN 1+HjN 1fL HZN Lf @ H M H5E 1 H {J f?v6H sJ f% f= @t#H jJ f= tf= H C HZJ HDL->E H5M L1L%D iH0M 1f L JH!M 1f L +HM 1fL H I ft#H I ftfH I HI HDHnJ H J H X x H DH ` H H H H RJ 0 H +J H G H G H TG H &G H F 1DEH F H5B 1 L%B HE LDEH B f% 0t0H B f= t#H xB f= tf= 0H RA HBA HDL-B 1 DEHE L DEH &A f% t0H 'B f= t#H #B f= tf= H @ Hɀ HDHaE L1DEܿ HPE 1f L L H;E 1HCE 1fL gH6E 1fL HH)E 1fL )H%E 1fL HG 1fL MHG H5A H C H5@ 1 L%A HC 1f H5A HC 1f L bHC LH C H5{@ 1 1HC 1f H5F H @L%d LDH=c HDH5h HDHc HDL Ad LDLd LDH J HDHPPPPPPPPP1ARW VH5VT RHnB yHpHe[A\A]A^] 1DEH A H5? =˿ 1L%? HA LHA 1fL ML HA 1MHpE H5sE | D H @ H5> 1 H = f?v6H = f% f= @t#H = f= tf= H h= H= HDL-? HR L18H u= f% 0t0H s= f= t#H o= f= tf= 0H = H< HDH? L 1L%E> H? 1f L H? 1f L H < f% t0H = f= t#H < f= tf= H r< H< HDHv? L 1IHi? 1fL *HV? 1fL H < f0t0H < f t#H ~< f0tfH `< H; HEH? L 1H U< f t0H n< ft#H w< f tfH 8< H; HEH> L 1aH o; ft#H B< ftfH D< Hz HDH> $ D H D H sD H BD H C H5< 1 L%< HP 1fL HC 1fL rHC L H HC H5; 1 L%; :H;C 1fL H X@ f% 0t0H ]@ f= t#H ]@ f= tf= 0H 9 HM@ HDL-; HhB L1H 1@ f%t0H -@ f= t#H <@ f= tf=H 9 H@ HDH@ L 1jH6B fL 1KH$B Lf H A H5[: 1 H N? f% 0t0H S? f= t#H S? f= tf= 0H 8 HC? HDL-: H^A L1H '? f%t0H #? f= t#H 2? f= tf=H 8 H? HDH> L 1L%9 YH%A f @ H @ H @ H k@ H5;9 1 L%S9 HP@ 1fL H>@ 1f L H,@ 1fL H @ 1fL nH_@ 1fL OH IA H 7 HEH8 H58 ) H /? 1ҿ 1H5G8 L%f8 L H ? 1H@ 1fL H 6 f%@ t0H 6 f= t#H 6 f@tf=@ H 6 H6 HDL-48 H 9 L1fH> 1f L GH}> 1f L (Hi> 1f L HR> 1f L H 5 HI3 HEHk8 f H ; H 5 h H ; P H j; 8 H X5 H K= H D< H A H56 H 0< H ?< H 0< H !< H < H ; UDHAVAUATSH w H HcH> H 4 HeH55 1[A\A]A^]H A fH A fH |A fH ^: fH MA fH !A fH @ p H < X H ; @ H ; ( H 69 H 9 H 8 H 8 H z8 H 7 H5s4 1 L%4 "L Hs7 1H? 1fL H 3 f% 0t0H 3 f= t#H 3 f= tf= 0H 2 H2 HDL-Y4 H 7 L1H 2 f% t0H 3 f= t#H 3 f= tf= H _2 H:r HDH6 L 16H6 1f L L H6 1H6 1fL H6 1fL H6 1fL H6 1fL HB> 1fL ]H9 H5_3 He 1[A\A]A^]5 D H #5 H5[2 1 L%s2 H5 1f H53 H5 1f L H4 LdH t4 H51 1 L5< L-< Ha4 1f H58 L%v< YH = 1f H51 6H L T LDL?U LDLDÀLD@LDH=T HDH5Y HDHT HDL FU LDL U LDH ; HDHPPPPP1AVAUATASARW VH5WE RHo3 zHpHe[A\A]A^]f 1DEH 2 H50 =˿ 1L%0 H2 LH; 1fL H; 1f L ML Hs; 1MHQ6 H5T6 Qf D H c1 H5/ 1 yH . f?v6H . f% f= @t#H |. f= tf= H H. Hs. HDL-/ HC L1H U. f% 0t0H S. f= t#H O. f= tf= 0H - H- HDH0 L 1L%%/ H0 1f L H0 1f L ~H - f% t0H - f= t#H - f= tf= H R- H- HDHV0 L 1)HI0 1fL H60 1fL H b- f0t0H q- f t#H ^- f0tfH @- H, HEH/ L 1H 5- f t0H N- ft#H W- f tfH - Hc, HEH/ L 1AH O, ft#H "- ftfH $- HZ HDHz/ HeL 1[A\A]A^] H . 8 H . L51 H 2 1 H5, L%1 fL L-1- II1H2 Ld@LLIDH2 1 L%, L5- 6LLf 1L H7 H c+ HEHR7 1L H H * HEH<7 1H97 1f L L H 7 1 L HY* H u4 HEH, 1_H, 1fL @L H' H ) HEH, 1H, 1fL H ) ft#H 0 ftfH 5 H) HDLf D 1H * 1H5* L%* L H5 1yH5 1fL L-+ SH* 1f L 4L H) H 3 HEH* 1 L Hg& H ( HEH+ 1H ( f% t0H . f= t#H ( f= tf= H ( H4 HDHB+ L 1H4 1fL jH/ 1fL KH'* 1fL ,Hx* 1fL H* H5 * D ~? UHe 1HAWAVAUATISHN H f; uH@H H H54 HCHHE1nH== bL+At$ 1Mu D At\ HAH u1A|$@w5H[A\A]A^A_]f. H [A\A]A^A_]HUH5Y= 1L= L5( H=`= A|$Aw#Ef { AAD$HS 9s$At\LMuALL 1vH1[A\A]A^A_]E11L= H ' f D Ctt DALH 1I&I uff. F UHAWAVLv AUATIS1HE,AD$t tH [A\A]A^A_] Dw(2 EH G 1H53 sA;\$rH1[A\A]A^A_] L $ D uED 1H R= H52 H ]2 At#H Y2 AtAH $ HK2 HDHw3 H5w3 14 E 1H |; H51 HD 1L=1 Hu; L"DL H}; 1DL H 2 1DL H 2 1DL H2 12 D ! = H CH @ T _ H H| E躈 1H ; H5p0 D 1H; H50 E @H(f D H H E 1H 9 H5/ HL 1H H0 H50 'fH tHo E 1H 9 H5b/ D 1HN0 H5N0 =E 1H 9 H5 / L 1H H#0 H5/ m E$ 1H r9 H5. >D 1H/ H5/ ! @ EH 9 1AL H5. AͿ 1H9 H5/ \ E躄 1H r7 H56. D 1L=X. H0. L}DL H<. 1^DL H)7 1?DL H. 1 DL H 7 1DL H- 1n` wH# : <>H H % vF\< @ D H CHc H H 1ÁP j }<HIcZ6dL(f. U H=- HAWL=- AVL5{- AUL- ATI SHH 3Y H H H=rP zAL$ H;1HY7 oAL$H;1H~7 TAL$H;1H7 9AL$H;1H7 H3 H H=, H H=O AL$ H;L $ HbL ML d, Hx7 LEMD1AL$ H;L $ MMؾ H7 MD MD1eAL$$LML O$ H; H7 MID MD MDHP1AL$(H;1H7 H3 H H=+ H H=N AL$,M^LLLM_H;MDIDID APMID V RMDHp7 PMI1ZAL$0HH;L C# LLLIDMIDID V MD RMDPH7 1MH3H H H=|8 H H=M ED$4H;1AL$8Hp8 H3 yH H=* `H H=AM GAL$< tuH* H;H5j % LP* = H) HD@H HE RMDH8 P1MXZHe1[A\A]A^A_]f D H;L) HG8 1 f U1Hf8 HATL% U SI<$ uOI<$ u#[HA\ H=) ]Ff D H) [ A\1]7 I $[ A\H=H) ]f U HAWAVIAUATSHHL=tT F I H=/ I H=^ A^ I?H ) L #) H LEȉH4Ho كLH: 1XA[A\? I?Hl; 10H( AI?L ( H ( LEAÀH( HEHP; A 1 ANEF 1I?H; A^ Hf( H H e H5 L HEH щL tH5 LI?PH; Q1FAYAZ tGH @L ' I?LDL' LDH' HEH; 1ǀ H b L ' LDL' LDH5' HDH' HDH' ÀHDL ' LDL' LDH=' HEHI?ASARV RHJ; P1RH0AN$H= HV' L T' IH LL' H`' LEH3' LDLDHDHUHI' HH4 HD HD@HuHUH9' IHC' LDILDH4 IH LMLELDL LE H' LeHD L K HElj E$I?L & ASAULD ARuuuuuuAPL0 A4L& RLDH : P1ATAN(HhL & L& H5 4 H+4 H& LDLDHDHD HD@HEH& HDHEH4 HH& HDIH4 LDIH& H}I?LDILMH& LDIH& LELDLmL 3 L3 LeL%& MASLD ARHDŀV RLD uLDH9 uuuuuuAUL-k& P1A~,HpAN0I?1H9 }AN8I?1H9 cAN<I?L& Lf3 H5 & H & H0& MEL <& LDLDARHDAPHDATL-& HDV@ RLDPLD1H9 L%& AN@H0L 2 L& H$& L 3 ωLDALDLDLDH 3 LD HD@HEH3 HDHEH% HH% HD HuA A }I?UH% DMHD L % ATHDL%!& @ASD]LDŀARDUAUL-% APL% uLDuuASD]ARASV RH8 P1ANDHpH{% L% H=b2 AH5u2 HDH% L % HEHV% IH% LDLDLDAALDHDHDHDHD HUILD@HUH8 uARAUL-% ATL%z C4L%% APL{% WLDH}V uP1ANHHPML % L1 H=1 H5% LDH% LDLDH% AULDL % ATHDASHDAPHDWLHDV RLDL|% PLDH 8 1H@x f H=& I H=U A^ I?H5 H9 H5z LR HEЉ4Ή RH|z L H H7 LE1Y_AX? I?Hn2 12H AI?L H LEAÀH HEHR2 A 1 ANEF 1I?H2 A^ Hh H H gy H5 y L HEH щL tH5x LI?P H2 Q1HY^ tgH @H# I?HDH# HDL @LDL RPLDH5 HEH6 1XZǀ H F L LDH5 HDH ÀHDH HDL # LDL LDH=~ HEI?ARV RHJ6 P1JH AN$H= HN L L IH LD HX LEH+ LDLDHDHUHA HH+ HD HD@HuHUH1 IH; LDILDH+ IH LMLELDL LE H LeHD L C HElj E$I?L ASAULD˅ARuuuuuuAPL,v A4La- RLIH1 P1ATL% AN(HpL L + L*+ H5N! H LDLDLDLDHD HD@HEH HDHEH* HH HDHH* HDIH H}I?LDIHULDH H, LMLmL- L * LD ATHD@ASHDŀARLDAP VL* uLDuuuuuAURH3 P1A~,HpAN0LF HM L O AAAΉAAAAEȉAAAAuH5 LDEH ? }HDI?AUHDL-* ATHDL% @ASD]LDŀARDUARDUASD]ARASAPL VLDþ RH!3 P1AN4I?H`Hw3 1AN8I?LT H3 DLD1TAN<H L " L5 LH HU ALDHDLDLD LD@LDHDHUH* HH* HDHHDH HuHDH5 HDA H}I?HUDL * AUŀL-v PHcr LDATL%w ASARAPAuAuuuV 4H2 1FAN@H`I?HT* Hu* AH5P HDL O HDRLEAH2 PA 1ANDL L H LDLDLDLD@HDHEH HDHEH HHY( HDHHh( HDIH H}I?LDIHULDH HDH LMHDLE@L,$L Lu) ATLDŀL- ASLDL% ARLp A4 uuuuuuRH2 P1贽ANHHpM?L5o HZ L L' LDH=' LDL 4 LDLEH LD HD@HDHEH HDHEH0 HH8 HDHH> HDIHuH5 LDHUH. HDH> AVHD AUHD@ATLDASŀAPL WLDLuuuuARV RH=1 P1腼HpHe1[A\A]A^A_]I* H=\( G fI* H=<( 'fI H=( 4fI H=( f UHAWAVAUATSHFD~ED L-@@ ^ I1H0 I} AA葻IM wH HcH> - H= 2 BfIM $ H=2 H= H fIIHHLI@HILD IHDHDHDLDLDHEHI} ASARV RHG2 P1藺I} DH0H3 1yDIM H3 HcH> D , H=g4 *f. DIM H HcH>f ( H=3 ڹ ) H=3 躹 ( H=G3 蚹u D * H=2 zU D ' H=3 Z5 D 5 H=4 :f. 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UfHAWAVAUATISH HxH dH%( HE1HE{ )EHEE )E)E D{PAE LuHx HZL H}Hs`HCHtHy Hqi H=A} Džt H}Ht tDžl HEH`Ht!H+H}lH`Džp LmMt LH}pIŀ{P H{@u HO =d} HC} HXHxL HYi H}Hs`HCHtH HZ H{@1ɺ - Ls@ AF<M~ LIvAAF<AGAI~L H{@LH5u DlL3AH={ n 1tNpI1ҿ H5 (rE pT t5HXPt'tȃt @ 9uH=!{ H } l f A A P AfHEdH+%( V HĈ D[A\A]A^A_] 11 HDžX f. EtA Hn H0 Hs@ HOH{@H`At$DI>pLH=" t< HXE1LXL-" A L%< H @= DDL tIHIELxJ1ILxE;yr1H=O L% nL`O< H=9y Ht AL1kIM9uH=: n1H= L5_ (nDpMf D H=x HtAU L1]kIM9uH= nRH=u! E1D1HXH5 HH 1,oOf UHAWAVAUATSH8}HUdH%( HU1҅$ DL$RIIEr HUHMI1HUA I\ Lu D I0M97 I>H uHE A~ IN(Ht EA9 A~ AFH HcH>DIvI| MAGAW9sPAYIN(AF DI| ?o n IFMAV AGAW9rHEdH+%( H8[A\A]A^A_]DI^I| HfDHU I^It Eĉ:D I^I| ffDI^HI| HDI^I| jDI^ I| MfDI^ I| /DI^1I| H YzDI^I| ?ouQnuK uE Rf. EA9SCH5y #f H5Z u UHAWAVAAUL-) ATESH 8 IIHHL=i H MDͅ MDŅI?ID1Et'DIHD! t9I?H 1I7H [A\A]A^A_] ML@tA HuA ILuM HH ?= A B > Cethtool version 6.7 off Adaptive RX: %s TX: %s None Auto Off BaseR RS LLRS 0x %s link modes:%*s %s %s pause frame use: Symmetric Transmit-only %s auto-negotiation: %s FEC modes: Not reported EEE status: enabled - inactive Tx LPI: %d (us) Supported EEE Advertised EEE Link partner advertised EEE tcp4 udp4 ah4 esp4 sctp4 tcp6 udp6 ah6 esp6 sctp6 ether -shared [fixed] [requested off] [requested on] %s%s: %s%s %u.%u.%u Cannot get device flags Cannot read permanent address Permanent address: %c%02x autoneg %s unmodified, ignoring rx-mini rx-jumbo other combined adaptive-rx adaptive-tx sample-interval stats-block-usecs pkt-rate-low pkt-rate-high rx-usecs rx-frames rx-usecs-irq rx-frames-irq tx-usecs tx-frames tx-usecs-irq tx-frames-irq rx-usecs-low rx-frames-low tx-usecs-low tx-frames-low rx-usecs-high rx-frames-high tx-usecs-high tx-frames-high Cannot parse arguments no features changed Cannot change %s Actual changes: Cannot get private flag names No private flags defined Cannot get private flags Cannot set private flags magic Cannot get driver information value requires length 1 not enough data from stdin too much data from stdin Cannot set EEPROM data DEVNAME Usage: ethtool [ FLAGS ] %s %s %s ( [ --all ] | ) FLAGS: -s|--change Filter: %d Rule Type: TCP over IPv4 Rule Type: UDP over IPv4 Rule Type: SCTP over IPv4 SPI: %d mask: 0x%x Rule Type: Raw IPv4 Rule Type: TCP over IPv6 Rule Type: UDP over IPv6 Rule Type: SCTP over IPv6 Rule Type: Raw IPv6 Unknown Flow type: %d RSS Context ID: %u Action: Drop Action: Wake-on-LAN rxclass: Unknown flow type %2x:%2x:%2x:%2x:%2x:%2x yes no Pause parameters for %s: Cannot get device settings Ring parameters for %s: Channel parameters for %s: Coalesce parameters for %s: Features for %s: no feature info available FAIL not online offline external_lb Cannot get strings Cannot test The test result is %s The test extra info: %s %d no stats available no memory available Cannot get stats information %s statistics: %.*s: %llu rx-flow-hash context flow-type ip4 ip6 'context' missing value Invalid context value[%s] Bad context value %x Invalid %s value[%s] %s-mask Invalid %s mask[%s] Add rule, invalid syntax rmgr: Location out of range Added rule with ID %d delete For RSS context %u: TCP over IPV4 flows UDP over IPV4 flows SCTP over IPV4 flows IPSEC AH/ESP over IPV4 flows TCP over IPV6 flows UDP over IPV6 flows SCTP over IPV6 flows IPSEC AH/ESP over IPV6 flows VLAN tag L3 proto IP SA IP DA rule Cannot get RX rings %d RX rings available Total %d rules Filename too long Flashing failed Can not get dump level Can not get dump data wb+ Can't open file %s: %s Can't close file %s: %s Can not set dump level Private flags for %s: %-*s: %s Capabilities: PTP Hardware Clock: none Cannot get EEE settings EEE Settings for %s: tx-lpi tx-timer Cannot set EEE settings %s: Cannot get tunable %s: %u %s: %d %s: %ld %s: Unknown format downshift Downshift count: %d Downshift disabled fast-link-down Fast Link Down enabled Fast Link Down disabled energy-detect-power-down mgmt dma phy ram ap dedicated ETHTOOL_RESET 0x%x Cannot issue ETHTOOL_RESET Components reset: 0x%x Components not reset: 0x%x msecs 'count' may not be zero. 'msecs' max value is %d. Cannot get FEC settings FEC parameters for %s: Active FEC encoding: encoding auto baser llrs Cannot set FEC settings queue_mask Cannot get number of queues Invalid queue mask Queue: %d Cannot identify NIC equal weight hkey default hfunc new Cannot get RX ring count %2x%n Invalid RSS hash key format Unknown hash function: %s New RSS context is %d full half duplex aui bnc mii fibre mdix phyad xcvr internal external wol sopass master-slave setting MDI not supported Cannot advertise speed %d duplex %s Cannot set new settings not setting speed not setting duplex not setting port not setting autoneg not setting phy_address not setting transceiver not setting mdix not setting wol not setting sopass Cannot get msglvl Cannot set new msglvl Offset Values ------ ------ 0x%04x: %02x raw hex file Cannot get register dump Can't open '%s': %s Cannot get EEPROM data natsemi Address Data ------- ------ 0x%02x 0x%04x tg3 Address Data ---------- ---- 0x%08x 0x%02x Cannot get Module EEPROM data SFP module not in cage? ioctl-only request --debug --json --include-statistics listening... Cannot get control socket --monitor Supports Wake-on: %s Wake-on: %s SecureOn password: %s%02x MDI-X: off (forced) on (forced) Unknown (auto) Supported ports: [ AUI BNC MII FIBRE Backplane Supports Supported Advertised Speed: Unknown! Duplex: Half Full Unknown! (%i) Port: Twisted Pair AUI BNC MII FIBRE Direct Attach Copper None Other PHYAD: %d Transceiver: internal external Auto-negotiation: %s %s%s %s%#x Cannot get message level Link detected: %s Cannot get link status No data available Link partner advertised RSS hash key: %02x: RSS hash function: Operation not supported %s: %s |--all -g|--show-ring|-G|--set-ring -a|--show-pause|-A|--pause --show-eee|--set-eee --cable-test --cable-test-tdr --show-module|--set-module Change generic options -a|--show-pause Show pause options Set pause options -c|--show-coalesce Show coalesce options -C|--coalesce Set coalesce options -g|--show-ring Query RX/TX ring parameters Set RX/TX ring parameters -K|--features|--offload FEATURE on|off ... -i|--driver Show driver information -d|--register-dump Do a register dump -e|--eeprom-dump Do a EEPROM dump -E|--change-eeprom Change bytes in device EEPROM -r|--negotiate Restart N-WAY negotiation -p|--identify [ TIME-IN-SECONDS ] -t|--test Execute adapter self test -S|--statistics Show adapter statistics --phy-statistics Show phy statistics -T|--show-time-stamping [ context %d ] -X|--set-rxfh-indir|--rxfh -f|--flash -P|--show-permaddr -w|--get-dump Get dump flag, data [ data FILENAME ] -W|--set-dump Set dump flag of the device N -l|--show-channels Query Channels -L|--set-channels Set Channels --show-priv-flags Query private flags --set-priv-flags Set private flags FLAG on|off ... --show-eee Show EEE settings Set EEE settings --set-phy-tunable Set PHY tunable --get-phy-tunable Get PHY tunable --get-tunable Get tunable --set-tunable Set tunable --reset Reset components --show-fec Show FEC settings --set-fec Set FEC settings -Q|--per-queue Apply per-queue command. Perform a cable test --show-tunnels --show-module --get-plca-cfg Get PLCA configuration --set-plca-cfg Set PLCA configuration --get-plca-status Get PLCA status information --show-mm Show MAC merge layer state --set-mm --show-pse --set-pse -h|--help Show this help --version Show version number dst action loc vlan-etype user-def src-ip dst-ip tclass l4proto l4data spi src-port dst-port dst-mac tos 8139cp 8139too r8169 de2104x e1000 e1000e igb ixgb ixgbe ixgbevf e100 amd8111e pcnet32 fec_8xx ibm_emac skge sky2 vioc smsc911x at76c50x-usb sfc st_mac100 st_gmac et131x altera_tse vmxnet3 fjes lan78xx dsa igc bnxt_en cpsw-switch lan743x fsl_enetc fsl_enetc_vf hns3 drv probe ifdown ifup rx_err tx_err tx_queued intr tx_done rx_status pktdata hw rx-checksumming rx-checksum tx-checksumming tx-checksum-* sg scatter-gather tx-scatter-gather* tso tcp-segmentation-offload tx-tcp*-segmentation ufo udp-fragmentation-offload tx-udp-fragmentation gso generic-segmentation-offload tx-generic-segmentation generic-receive-offload rx-gro large-receive-offload rx-lro rxvlan rx-vlan-offload rx-vlan-hw-parse txvlan tx-vlan-offload tx-vlan-hw-insert ntuple ntuple-filters rx-ntuple-filter rxhash receive-hashing rx-hashing 10baseT/Half 10baseT/Full 100baseT/Half 100baseT/Full 1000baseT/Half 1000baseT/Full 10000baseT/Full 2500baseX/Full 1000baseKX/Full 10000baseKX4/Full 10000baseKR/Full 10000baseR_FEC 20000baseMLD2/Full 20000baseKR2/Full 40000baseKR4/Full 40000baseCR4/Full 40000baseSR4/Full 40000baseLR4/Full 56000baseKR4/Full 56000baseCR4/Full 56000baseSR4/Full 56000baseLR4/Full 25000baseCR/Full 25000baseKR/Full 25000baseSR/Full 50000baseCR2/Full 50000baseKR2/Full 100000baseKR4/Full 100000baseSR4/Full 100000baseCR4/Full 100000baseLR4_ER4/Full 50000baseSR2/Full 1000baseX/Full 10000baseCR/Full 10000baseSR/Full 10000baseLR/Full 10000baseLRM/Full 10000baseER/Full 2500baseT/Full 5000baseT/Full 50000baseKR/Full 50000baseSR/Full 50000baseCR/Full 50000baseLR_ER_FR/Full 50000baseDR/Full 100000baseKR2/Full 100000baseSR2/Full 100000baseCR2/Full 100000baseLR2_ER2_FR2/Full 100000baseDR2/Full 200000baseKR4/Full 200000baseSR4/Full 200000baseLR4_ER4_FR4/Full 200000baseDR4/Full 200000baseCR4/Full 100baseT1/Full 1000baseT1/Full 400000baseKR8/Full 400000baseSR8/Full 400000baseLR8_ER8_FR8/Full 400000baseDR8/Full 400000baseCR8/Full 100000baseKR/Full 100000baseSR/Full 100000baseLR_ER_FR/Full 100000baseDR/Full 100000baseCR/Full 200000baseKR2/Full 200000baseSR2/Full 200000baseLR2_ER2_FR2/Full 200000baseDR2/Full 200000baseCR2/Full 400000baseKR4/Full 400000baseSR4/Full 400000baseLR4_ER4_FR4/Full 400000baseDR4/Full 400000baseCR4/Full 100baseFX/Half 100baseFX/Full 10baseT1L/Full 800000baseCR8/Full 800000baseKR8/Full 800000baseDR8/Full 800000baseDR8_2/Full 800000baseSR8/Full 800000baseVR8/Full 10baseT1S/Full 10baseT1S/Half \t \n \r \f \b \\ \" \' Up 10 Mbps 100 Mbps 1000 Mbps Reserved ? Not forced Disabled Drop On Lock Drop On Unlock Drop to CPU Unmodified Untagged Tagged Normal Provider Ether Type DSA Defaults Tag Priority Tag & IP Priority No unknown DA No unknown multicast DA No unknown unicast DA Allow unknown DA Blocking/Listening Forwarding 1522 2048 10240 Fallback Check Port Status %.02u: %-38.38s 0x%.4x Pause Enabled %-36.36s %u My Pause Half-duplex Flow Control 802.3 PHY Detected Link Status %-36.36s %s Auto-Media Detect Disable Transmitter Paused Config Duplex Config Mode %-36.36s 0x%x PCS Control Flow Control's Forced value Force Flow Control Link's Forced value Force Link Duplex's Forced value Force Duplex Force Speed Jamming Control Switch Identifier Port Control Egress Mode Ingress & Egress Header Mode IGMP and MLD Snooping Frame Mode VLAN Tunnel TagIfBoth Initial Priority assignment Egress Flooding mode Port State Port Control 1 Message Port Trunk Port Trunk ID FID[5:4] %-36.36s 0x%.2x Port Base VLAN Map (Header) FID[3:0] VLANTable Default VLAN ID & Priority Default Priority Force to use Default VID Default VLAN Identifier Port Control 2 Force good FCS in the frame Jumbo Mode 802.1QMode Discard Tagged Frames Discard Untagged Frames Map using DA hits ARP Mirror enable Egress Monitor Source Port Ingress Monitor Source Port Egress Rate Control Egress Rate Control 2 Port Association Vector Port ATU Control Priority Override PortEType InDiscardsLo Frame Counter InDiscardsHi Frame Counter InFiltered Frame Counter OutFiltered Frame Counter Tag Remap 0-3 Tag Remap 4-7 Queue Counters 100 or 200 Mbps Delay Default 200 No error, link OK Link failure Offline Autoneg Error No Pause Symmetric Pause Symmetric & Asymmetric Pause 16 Bits 24 Bits 32 Bits 40 Bits 100BaseFX 1000BaseX SGMII System SGMII Media False True 14mV 700mV 112mV 210mV 308mV 406mV 504mV 602mV EEE Enabled Physical Control RGMII Receive Timing Control RGMII Transmit Timing Control 200 BASE Mode FID[11:4] %-36.36s 0x%.3x Use Default Queue Priority Policy Control Port Ether Type Rx Frame Counter LED Control Fiber Control Fiber Reset Autoneg Enable Power down Isolate Restart Autoneg Fiber Status 100Base-X FD 100Base-X HD Autoneg Complete Remote Fault PHY ID 1 PHY ID 2 Fiber Autoneg Advertisement 1000BaseX HD 1000BaseX FD Fiber Link Autoneg Ability Acknowledge Fiber Autoneg Expansion Page Received Link Partner Autoneg Ability Fiber Next Page Transmit Fiber Link Partner Next Page Extended Status Fiber Specific Control Fiber Transmit FIFO Depth SERDES Loopback Force Link Good MAC Interface Power Down Fiber Specific Status Speed/Duplex Resolved Sync Energy Detect Transmit Pause Receive Pause Fiber Interrupt Enable Speed Changed Duplex Changed Link Status Change Symbol Error False Carrier Fiber Interrupt Status Fiber Receive Error Counter PRBS Control PRBS Error Counter LSB PRBS Error Counter MSB Fiber Specific Control 2 1000BaseX Noise Filtering 1000BaseFX Noise Filtering SERDES Autoneg Bypass Enable SERDES Autoneg Bypass Status Fiber Transmitter Disable SGMII/Fiber Output Amplitude 10 Gb or 2500 Mbps Alternate 10 9 8 Transmit Pause Enable bit Receive Pause Enable bit Duplex Fixed Alternate Speed Mode MII PHY Mode EEE force value Force EEE LAG Port VTU Page LAG ID Force Mapping Allow bad FCS Allow VID of Zero IP Priority Mapping Table IEEE Priority Mapping Table Port Control 3 Queue Control Cut Through Control Debug Counters %s Switch Port Registers 64 bytes 128 bytes 192 bytes 0x%.03x: %-44.44s 0x%.8x MAX_FL (Maximum frame length) %-47.47s %u FCE (Flow control enable) PROM (Promiscuous mode) LOOP (Internal loopback) FDEN (Full duplex enable) HBC (Heartbeat control) GTS (Graceful transmit stop) IADDR1 %-47.47s 0x%.16llx IADDR2 %-47.47s 0x%.16x GADDR1 GADDR2 X_WMRK %-47.47s %s %-47.47s 0x%.2x Stopped Yes No 10Mbits/ Sec 100Mbits/Sec Descriptor Registers Command Registers Interrupt Registers Link status Register Valid Invalid Counter overflow No missed frames %u missed frames Diagnostic Standard Round-robin RX-has-priority Big Little fail RxOK TxNoBufs TxOK FD_Short AUI_TP RxTimeout RxStopped RxNoBufs TxUnder TxJabber TxStop Hash Perfect dis Hash-only Filtering Pass Bad Frames Inverse Filtering Promisc Mode Pass All Multicast Forcing collisions Back pressure enabled Capture effect enabled Transmit interrupt Transmit stopped Transmit underflow Receive interrupt Receive stopped AUI_TP pin Full duplex Link fail System error AUI TP Autopolarity state PLL self-test done PLL self-test pass PLL sampler low PLL sampler high SIA reset CSR autoconfiguration 10base-T APLL start Input enable Enable pins 1, 3 Enable pins 2, 4 Enable pins 5, 6, 7 Encoder enable Loopback enable Driver enable Link pulse send enable Receive squelch enable Heartbeat enable Link test enable Autopolarity enable Set polarity plus Jabber disable Host unjab Jabber clock Test clock Force unsquelch Force link fail PLL self-test start Force receiver low EarlyRx TimerExp ANC Link pass Timer expired ExtReg SROM BootROM Read Mode Continuous mode Unstable NLP detected Transmit remote fault AUI/BNC port 10base-T port Must Be One Autonegotiation enable BNC GP LED1 enable GP LED1 on LED stretch disable GP LED2 enable GP LED2 on 21040 Registers 21041 Registers MDI MDI-X Unknown disabled normal big little 10Mb/s 100Mb/s 1000Mb/s not used no link config 64-bit 32-bit 100MHz PCI-X 66MHz PCI 133MHz don't pass ignored accept ignore 1/2 1/4 1/8 reserved 16384 8192 4096 1024 512 256 M88 IGP IGP2 unknown 0-50 50-80 80-110 110-140 140+ reverse 5-bit MII force MDI force MDIX 1000 auto, 10/100 MDI wtf PCI Express PHY Registers JAGCore Global Registers TXDMA Registers RXDMA Registers paused SERDES undefined addr_low 0x%04lx: %-16s 0x%08x addr_high hash_table_high hash_table_low r_des_start x_des_start r_buff_size ecntrl ievent imask ivec r_des_active x_des_active mii_data mii_speed r_bound r_fstart x_fstart fun_code r_cntrl r_hash x_cntrl %s: 0x%x %s %s: 0x%x Reg 0x%x: 0x%x json_writer.c self->depth > 0 json object self->depth == 0 %lu SI mode register SI control BDR mode register SI capability register 0 SI capability register 1 TX BDR 0 mode register TX BDR 0 status register TX BDR 0 length register TX BDR 1 mode register TX BDR 1 status register TX BDR 1 length register TX BDR 2 mode register TX BDR 2 status register TX BDR 2 length register TX BDR 3 mode register TX BDR 3 status register TX BDR 3 length register TX BDR 4 mode register TX BDR 4 status register TX BDR 4 length register TX BDR 5 mode register TX BDR 5 status register TX BDR 5 length register TX BDR 6 mode register TX BDR 6 status register TX BDR 6 length register TX BDR 7 mode register TX BDR 7 status register TX BDR 7 length register TX BDR 8 mode register TX BDR 8 status register TX BDR 8 length register TX BDR 9 mode register TX BDR 9 status register TX BDR 9 length register TX BDR 10 mode register TX BDR 10 status register TX BDR 10 length register TX BDR 11 mode register TX BDR 11 status register TX BDR 11 length register TX BDR 12 mode register TX BDR 12 status register TX BDR 12 length register TX BDR 13 mode register TX BDR 13 status register TX BDR 13 length register TX BDR 14 mode register TX BDR 14 status register TX BDR 14 length register TX BDR 15 mode register TX BDR 15 status register TX BDR 15 length register RX BDR 0 mode register RX BDR 0 status register RX BDR 0 buffer size register RX BDR 0 length register RX BDR 1 mode register RX BDR 1 status register RX BDR 1 buffer size register RX BDR 1 length register RX BDR 2 mode register RX BDR 2 status register RX BDR 2 buffer size register RX BDR 2 length register RX BDR 3 mode register RX BDR 3 status register RX BDR 3 buffer size register RX BDR 3 length register RX BDR 4 mode register RX BDR 4 status register RX BDR 4 buffer size register RX BDR 4 length register RX BDR 5 mode register RX BDR 5 status register RX BDR 5 buffer size register RX BDR 5 length register RX BDR 6 mode register RX BDR 6 status register RX BDR 6 buffer size register RX BDR 6 length register RX BDR 7 mode register RX BDR 7 status register RX BDR 7 buffer size register RX BDR 7 length register RX BDR 8 mode register RX BDR 8 status register RX BDR 8 buffer size register RX BDR 8 length register RX BDR 9 mode register RX BDR 9 status register RX BDR 9 buffer size register RX BDR 9 length register RX BDR 10 mode register RX BDR 10 status register RX BDR 10 length register RX BDR 11 mode register RX BDR 11 status register RX BDR 11 length register RX BDR 12 mode register RX BDR 12 status register RX BDR 12 length register RX BDR 13 mode register RX BDR 13 status register RX BDR 13 length register RX BDR 14 mode register RX BDR 14 status register RX BDR 14 length register RX BDR 15 mode register RX BDR 15 status register RX BDR 15 length register Port mode register Port status register Port capability register 0 Port capability register 1 Port RFS capability register 88E6085 88E6095 88E6097 88E6190X 88E6390X 88E6131 88E6320 88E6123 88E6161 88E6165 88E6171 88E6172 88E6175 88E6176 88E6190 88E6191 88E6185 88E6240 88E6290 88E6321 88E6141 88E6341 88E6352 88E6350 88E6351 88E6390 Compensation Disabled Mode High Power Mode Normal Compensation Mode Autonegotiation disable Transmit disable Ability detect Acknowledge detect Complete acknowledge FLP link good, nway complete Link check unknown (reserved) internal loopback external loopback unknown (not used) Bus error: parity Bus error: master abort Bus error: target abort stopped running: fetch desc running: wait xmit end running: read buf running: setup packet suspended running: close desc running: chk pkt end running: wait for pkt running: close running: flush running: queue No transmit automatic polling 8-longword boundary alignment MAL%d Registers TX| RX| CTP%d = 0x%08x RCBS%d = 0x%08x (%d) EMAC%d Registers IPCR = 0x%08x ZMII%d Registers RGMII%d Registers FER = %08x SSR = %08x TAH%d Registers Driver: %s Version: %s APROM: %04x CSR%02d: BCR%02d: MII%02d: BABL CERR MISS MERR RINT IDON INTR RXON TXON TDMD STOP INIT BABLM MISSM MERRM RINTM TINTM IDONM DXSUFLO LAPPEN DXMT2PD EMBA BSWP EN124 DMAPLUS TXDPOLL APAD_XMT ASTRP_RCV MFCO MFCON UINTCMD UINT RCVCCO RCVCCOM TXSTRT TXSTRTM JAB JABM TOKINTD LTINTEN SINT SINTE SLPINT SLPINTE EXDINT EXDINTE MPPLBA MPINT MPINTE MPEN MPMODE SPND FASTSPNDE RXFRTG RDMD RXDPOLL STINT STINTE MREINT MREINTE MAPINT MAPINTE MCCINT MCCINTE MCCIINT MCCIINTE MIIPDTINT MIIPDTINTE PCnet/PCI 79C970 PCnet/PCI II 79C970A PCnet/FAST 79C971 PCnet/FAST+ 79C972 PCnet/FAST III 79C973 PCnet/Home 79C978 PCnet/FAST III 79C975 PCnet/PRO 79C976 VER: %04x PARTIDU: %04x TMAULOOP LEDPE APROMWE INTLEVEL EADISEL AWAKE ASEL XMAUSEL PVALID EEDET %s Init 0x%08X Value 0x%08X MAC Addresses Addr %d %02X%c Genesis Yukon Yukon-Lite Yukon-LP Yukon-2 XL Yukon Extreme Yukon-2 EC Ultra Yukon-2 EC Yukon-2 FE Yukon-2 FE Plus Yukon Supreme Yukon Ultra 2 Yukon Optima (Unknown) (rev %d) %12s address: %02X %02X Physical Control Registers Moderation Timer %s Prefetch Control 0x%08X Last Index %u TX1 report %u TX2 report %u TX threshold %u Put Index %u Get Index %u cmd %08x = %08x 10G 1G Active Reversed Not Done Not Half/Full Advertise Force 10/100 In Progress Failed Passed Accepted Rejected Reverse Masked Bypassed Free-Running Phase-Adjusted Forced Enhanced Reduced Failed or Not Run Mac/BIU Registers Reset In Progress Rx Complete %s Interrupt: %s Rx Descriptor Rx Packet Error Rx Early Threshold Rx Idle Rx Overrun Tx Packet OK Tx Descriptor Tx Packet Error Tx Idle Tx Underrun MIB Service Software Power Management Event Phy High Bits Error Rx Status FIFO Overrun Received Target Abort Received Master Abort Signaled System Error Detected Parity Error Rx Reset Complete Tx Reset Complete No Interrupts Active Interrupts %s Wake on Arp Enabled SecureOn Hack Detected Phy Interrupt Received Arp Received Pattern 0 Received Pattern 1 Received Pattern 2 Received Pattern 3 Received Magic Packet Received Counters Frozen Value = %d Internal Phy Registers ---------------------- Port Isolated Loopback Enabled Remote Fault Detected Advertising 100Base-T4 Advertising Pause Next Page Desired Supports 100Base-T4 Supports Pause Indicates Remote Fault MII Interrupt Detected False Carrier Detected Rx Error Detected MII Interrupts %s MII Interrupt Pending 'Magic' Phy Registers RxErr TxErr RxNoBuf LinkChg RxFIFO TxNoBuf SWInt TimeOut SERR %s%s%s%s%s%s%s%s%s%s%s ERxOK ERxOverWrite ERxBad ERxGood , RESET %s%s%s%s Big-endian mode Home LAN enable VLAN de-tagging RX checksumming PCI 64-bit DAC PCI Multiple RW Offset Value ------ ---------- 0x%04x 0x%08x LAN911x Registers index 1, MAC_CR = 0x%08X index 2, ADDRH = 0x%08X index 3, ADDRL = 0x%08X index 4, HASHH = 0x%08X index 5, HASHL = 0x%08X index 6, MII_ACC = 0x%08X index 7, MII_DATA = 0x%08X index 8, FLOW = 0x%08X index 9, VLAN1 = 0x%08X index A, VLAN2 = 0x%08X index B, WUFF = 0x%08X index C, WUCSR = 0x%08X index 7, Reserved = 0x%04X index 8, Reserved = 0x%04X index 9, Reserved = 0x%04X index 10, Reserved = 0x%04X index 11, Reserved = 0x%04X index 12, Reserved = 0x%04X index 13, Reserved = 0x%04X index 14, Reserved = 0x%04X index 15, Reserved = 0x%04X index 19, Reserved = 0x%04X index 20, TSTCNTL = 0x%04X index 21, TSTREAD1 = 0x%04X index 22, TSTREAD2 = 0x%04X index 23, TSTWRITE = 0x%04X index 24, Reserved = 0x%04X index 25, Reserved = 0x%04X index 26, Reserved = 0x%04X %s (disabled) PCI config ---------- %02x Bus Management Unit ------------------- Blink Source Receive Queue 1 Sync Transmit Queue 1 Async Transmit Queue 1 Receive RAMbuffer 1 Sync Transmit RAMbuffer 1 Async Transmit RAMbuffer 1 Receive MAC FIFO 1 Transmit MAC FIFO 1 Receive Queue 2 Async Transmit Queue 2 Sync Transmit Queue 2 Receive RAMbuffer 2 Sync Transmit RAMbuffer 2 Async Transmit RAMbuffer 21 Receive MAC FIFO 2 Transmit MAC FIFO 2 Descriptor Poll Receive 1 Transmit 1 Receive 2 Transmit 2 Status FIFO Status level TX status ISR Rx GMAC 1 %-32s 0x%08X Tx GMAC 1 Rx GMAC 2 Tx GMAC 2 503_ISL3861 503_ISL3863 503 503_ACC 505 505_2958 505A 505AMX End Address Almost Full Thresh Control/Test FIFO Flush Mask FIFO Flush Threshold Truncation Threshold Upper Pause Threshold Lower Pause Threshold VLAN Tag FIFO Write Pointer FIFO Write Level FIFO Read Pointer FIFO Read Level 8139 8139-K 8139A 8139A-G 8139B 8130 8139C 8100 8100B/8139D 8139C+ 8101 8169s 8110s 8169sb/8110sb 8169sc/8110sc 8102e 8101e 8168b/8111b 8100e 8168cp/8111cp 8168c/8111c 8168d/8111d 8168dp/8111dp 8105e 8168e/8111e 8168evl/8111evl 8168f/8111f 8402 8411 8106e 8168g/8111g Connector %-41s : 0x%02x (unknown or unspecified) (SC) (BNC/TNC) (FibreJack) (LC) (MT-RJ) (MU) (SG) (Optical pigtail) (MPO Parallel Optic) (MPO Parallel Optic - 2x16) (HSSDC II) (Copper pigtail) (RJ45) (No separable connector) (MXC 2x16) (CS optical connector) (Mini CS optical connector) (MPO 2x12) (MPO 1x16) (reserved or unknown) Encoding (unspecified) (8B/10B) (4B/5B) (NRZ) (Manchester) (SONET Scrambled) (64B/66B) (PAM4) discarded accepted 2048 bytes 1024 bytes 512 bytes 256 bytes bits [47:36] bits [43:32] bits [39:28] bits [35:24] multicast only unicast only multicast and unicast source destination %04d: 0x%08X Super MULTI: %02x:%02x:%02x:%02x:%02x:%02x Ports: 0x%x VLAN: %04d Secure Block DLR UNI : ALE Entries (%d): %04d: %s OUI : VLAN %04d: member: 0x%x mc flood unreg: 0x%x mc flood reg: 0x%x untag: 0x%x %s = %s: %4zu Row %-*s %*s %4zu ST MAC 10/100 Registers control reg 0x%08X addr HI 0x%08X addr LO 0x%08X multicast hash HI 0x%08X multicast hash LO 0x%08X MII addr 0x%08X MII data %08X flow control 0x%08X VLAN1 tag 0x%08X VLAN2 tag 0x%08X mac wakeup frame 0x%08X mac wakeup crtl 0x%08X CSR%d 0x%08X DMA cur tx buf addr 0x%08X DMA cur rx buf addr 0x%08X ST GMAC Registers Reg%d 0x%08X Core Version %d.%d (0)TX_EN %d (1)RX_EN %d (2)XON_GEN %d (3)ETH_SPEED %d (4)PROMIS_EN %d (5)PAD_EN %d (6)CRC_FWD %d (7)PAUSE_FWD %d (8)PAUSE_IGN %d (9)TXADDR_INS %d (10)HD_EN %d (11)EXCESS_COL %d (12)LATE_COL %d (13)SW_RESET %d (14)MHASH_SEL %d (15)LOOP_EN %d (16-18)TX_ADDR_SEL %d (19)MAGIC_EN %d (20)SLEEP %d (21)WAKEUP %d (22)XOFF_GEN %d (23)CTRL_FRAME_EN %d (24)NO_LEN_CHECK %d (25)ENA_10 %d (26)RX_ERR_DISC %d (31)CTRL_RESET %d Control Registers Datapath Registers ================== Transmit Queue %d ---------------- Transmit Ring Transmit Data Ring Receive Queue %d Receive Ring 0 Receive Ring 1 Receive Data Ring LAN78xx Registers: ID_REV = 0x%08X INT_STS = 0x%08X HW_CFG = 0x%08X PMT_CTRL = 0x%08X E2P_CMD = 0x%08X E2P_DATA = 0x%08X USB_STATUS = 0x%08X VLAN_TYPE = 0x%08X MAC Registers: MAC_CR = 0x%08X MAC_RX = 0x%08X MAC_TX = 0x%08X FLOW = 0x%08X ERR_STS = 0x%08X MII_ACC = 0x%08X MII_DATA = 0x%08X EEE_TX_LPI_REQ_DLY = 0x%08X EEE_TW_TX_SYS = 0x%08X EEE_TX_LPI_REM_DLY = 0x%08X WUCSR = 0x%08X PHY Registers: Mode Control = 0x%04X Mode Status = 0x%04X 1000BASE-T Control = 0x%04X 1000BASE-T Status = 0x%04X Reserved = 0x%04X Bypass Control = 0x%04X Interrupt Mask = 0x%04X Interrupt Status = 0x%04X LED Mode Select = 0x%04X LED Behavior = 0x%04X PXP Registers ------ ------- PCIe statistics: %-30s : LAN743x Registers: CHIP_ID_REV = 0x%08X FPGA_REV = 0x%08X STRAP_READ = 0x%08X MAC_CR = 0x%08X MAC_RX = 0x%08X MAC_TX = 0x%08X FLOW = 0x%08X MII_ACC = 0x%08X MII_DATA = 0x%08X WUCSR = 0x%08X WK_SRC = 0x%08X %-*s : 0x%016llx %-41s : Module temperature high alarm On Module temperature Module voltage %-41s : %.4f V Laser tx bias current %s (Channel %d) %-41s : %.3f mA Transmit avg optical power %-41s : %.4f mW / %.2f dBm Receiver signal OMA Rcvr signal avg optical power %-41s : %s %s_%u Symmetric Receive-only Transmit-only %s Extended identifier (unknown) Transceiver codes %s 10G Ethernet: 10G Base-LR %s 10G Ethernet: 10G Base-SR %s Infiniband: 1X SX %s Infiniband: 1X LX %s SONET: OC-48, long reach %s SONET: OC-48, short reach %s SONET: OC-12, short reach %s SONET: OC-3, short reach %s Ethernet: BASE-PX %s Ethernet: BASE-BX10 %s Ethernet: 100BASE-FX %s Ethernet: 100BASE-LX/LX10 %s Ethernet: 1000BASE-T %s Ethernet: 1000BASE-CX %s Ethernet: 1000BASE-LX %s Ethernet: 1000BASE-SX %s FC: short distance (S) %s FC: long distance (L) %s FC: medium distance (M) %s FC: Longwave laser (LC) %s FC: Longwave laser (LL) %s Active Cable %s Passive Cable %s FC: Copper FC-BaseT %s FC: Twin Axial Pair (TW) %s FC: Twisted Pair (TP) %s FC: Miniature Coax (MI) %s FC: Video Coax (TV) %s FC: Multimode, 50um (M5) %s FC: Single Mode (SM) %s FC: 1200 MBytes/sec %s FC: 800 MBytes/sec %s FC: 400 MBytes/sec %s FC: 200 MBytes/sec %s FC: 100 MBytes/sec %s Extended: 5GBASE-T %s Extended: 2.5GBASE-T %s Extended: 40G SWDM4 %s Extended: 100G SWDM4 %s Extended: 100G PAM4 BiDi %s Extended: 200GBASE-FR4 %s Extended: 50GBASE-LR %s Extended: 200GBASE-LR4 %s Extended: 64GFC EA %s Extended: 64GFC SW %s Extended: 64GFC LW %s Extended: 128GFC EA %s Extended: 128GFC SW %s Extended: 128GFC LW MBd BR, Nominal %-41s : %u%s Rate identifier (8/4/2G Rx Rate_Select only) (8/4/2G Tx Rate_Select only) km Length (SMF,km) Length (SMF) Length (50um) Length (62.5um) Length (Copper) Length (OM3) Passive Cu cmplnce. (SFF-8431 appendix E) [SFF-8472 rev10.4 only] Active Cu cmplnce. (SFF-8431 limiting) Laser wavelength %-41s : %unm Vendor name Vendor OUI %-41s : %02x:%02x:%02x Vendor PN Vendor rev Option values %-41s : 0x%02x 0x%02x %s RX_LOS implemented %s TX_FAULT implemented %s TX_DISABLE implemented %s RATE_SELECT implemented %s Power level 2 requirement %s Paging implemented %s Power level 3 requirement % BR margin, max BR margin, min Vendor SN Date code Laser bias current high alarm Optical diagnostics support %-41s : No %-41s : Yes Laser bias current Laser output power %s(Channel %d) %-41s : 0x%02x %s CDR present in TX, %s No CDR in TX, CDR present in RX No CDR in RX Power set Power override %s (reserved or unknown) %s 100G Ethernet: 100G CLR4 %s 5GBASE-T %s 2.5GBASE-T %s 40G SWDM4 %s 100G SWDM4 %s 100G PAM4 BiDi %s 200GBASE-FR4 %s 200G 1550 nm PSM4 %s 50GBASE-LR %s 200GBASE-LR4 %s 64GFC EA %s 64GFC SW %s 64GFC LW %s 128GFC EA %s 128GFC SW %s 128GFC LW %s 40G OTN (OTU3B/OTU3C) %s SAS 6.0G %s SAS 3.0G %s FC: Multimode, 62.5m (M6) %s FC: Multimode, 50m (M5) %s FC: Multimode, 50um (OM3) %s FC: 1600 MBytes/sec Length (OM3 50um) Length (OM2 50um) Length (OM1 62.5um) Transmitter technology (850 nm VCSEL) (1310 nm VCSEL) (1550 nm VCSEL) (1310 nm FP) (1310 nm DFB) (1550 nm DFB) (1310 nm EML) (1550 nm EML) (Others/Undefined) (1490 nm DFB) (Copper cable unequalized) Attenuation at 2.5GHz %-41s : %udb Attenuation at 5.0GHz Attenuation at 7.0GHz Attenuation at 12.9GHz %-41s : %.3lfnm Laser wavelength tolerance %s Revision not specified %s SFF-8636 Rev 1.4 %s SFF-8636 Rev 1.5 %s SFF-8636 Rev 2.0 %s SFF-8636 Rev 2.5/2.6/2.7 %s Unallocated Rx loss of signal Tx loss of signal Rx loss of lock Tx loss of lock Tx fault Tx adaptive eq fault Power class %-41s : %d Max power %-41s : %.02fW Cable assembly length %-41s : > 6.3km %-41s : %0.2fm Tx CDR bypass control Rx CDR bypass control Tx CDR Rx CDR (Copper cable, %s unequalized) %s passive equalized) %s linear active equalizers) Attenuation at 5GHz Attenuation at 7GHz Attenuation at 25.8GHz %-41s : %0.2fkm Length (OM5) Length (OM4) Length (OM3 50/125um) Length (OM2 50/125um) CLEI code Revision compliance %-41s : Rev. %d.%d Module State (ModuleLowPwr) (ModulePwrUp) (ModuleReady) (ModulePwrDn) (ModuleFault) Module Fault Cause (TEC runaway) (Data memory corrupted) (Program memory corrupted) LowPwrAllowRequestHW LowPwrRequestSW (none) %s: Unknown! (%d) %s: %s PHYAD: %u Transceiver Link detected: %s (%s (%u , %u , %s SQI: %u /%u Link Down Events: %u PLCA support: OPEN Alliance v%u.%u non-standard sending genetlink rtnetlink %s %s packet (%u bytes): msg length %u noop malformed errno=%d done overrun type %u ethool cmd %u genl-ctrl [%u] %s family=%u type=0x%04x ifindex=%d flags=0x%x change=0x%x and attribute netlink %s: %s (offset %u) netlink error offending message%s: ethtool %*s Supported link modes: Supported pause frame use: Supported FEC modes: Advertised link modes: Advertised pause frame use: Advertised FEC modes: Speed: Unknown! Speed: %uMb/s Lanes: %u master-slave cfg master-slave status NL_ATTR_TYPE_INVALID NL_ATTR_TYPE_FLAG NL_ATTR_TYPE_U8 NL_ATTR_TYPE_U16 NL_ATTR_TYPE_U32 NL_ATTR_TYPE_U64 NL_ATTR_TYPE_S8 NL_ATTR_TYPE_S16 NL_ATTR_TYPE_S32 NL_ATTR_TYPE_S64 NL_ATTR_TYPE_BINARY NL_ATTR_TYPE_STRING NL_ATTR_TYPE_NUL_STRING NL_ATTR_TYPE_NESTED NL_ATTR_TYPE_NESTED_ARRAY NL_ATTR_TYPE_BITFIELD32 ETHTOOL_A_STRING_UNSPEC ETHTOOL_A_STRING_INDEX ETHTOOL_A_STRING_VALUE NL_POLICY_TYPE_ATTR_UNSPEC NL_POLICY_TYPE_ATTR_TYPE NL_POLICY_TYPE_ATTR_PAD NL_POLICY_TYPE_ATTR_MASK ETHTOOL_A_BITSET_BIT_UNSPEC ETHTOOL_A_BITSET_BIT_INDEX ETHTOOL_A_BITSET_BIT_NAME ETHTOOL_A_BITSET_BIT_VALUE ETHTOOL_A_STRINGS_UNSPEC ETHTOOL_A_STRINGS_STRING CTRL_ATTR_POLICY_UNSPEC CTRL_ATTR_POLICY_DO CTRL_ATTR_POLICY_DUMP CTRL_ATTR_MCAST_GRP_UNSPEC CTRL_ATTR_MCAST_GRP_NAME CTRL_ATTR_MCAST_GRP_ID CTRL_ATTR_OP_UNSPEC CTRL_ATTR_OP_ID CTRL_ATTR_OP_FLAGS ETHTOOL_A_CABLE_PULSE_UNSPEC ETHTOOL_A_CABLE_PULSE_mV ETHTOOL_A_CABLE_AMPLITUDE_mV ETHTOOL_A_CABLE_STEP_UNSPEC ETHTOOL_A_CABLE_RESULT_UNSPEC ETHTOOL_A_CABLE_RESULT_PAIR ETHTOOL_A_CABLE_RESULT_CODE ETHTOOL_A_STATS_GRP_HIST_VAL ETHTOOL_A_BITSET_BITS_UNSPEC ETHTOOL_A_BITSET_BITS_BIT ETHTOOL_A_STRINGSET_UNSPEC ETHTOOL_A_STRINGSET_ID ETHTOOL_A_STRINGSET_COUNT ETHTOOL_A_STRINGSET_STRINGS ETHTOOL_A_CABLE_TDR_NEST_STEP ETHTOOL_A_CABLE_NEST_UNSPEC ETHTOOL_A_CABLE_NEST_RESULT ETHTOOL_A_MM_STAT_UNSPEC ETHTOOL_A_MM_STAT_PAD ETHTOOL_A_MM_STAT_SMD_ERRORS ETHTOOL_A_MM_STAT_HOLD_COUNT ETHTOOL_A_STATS_GRP_UNSPEC ETHTOOL_A_STATS_GRP_PAD ETHTOOL_A_STATS_GRP_ID ETHTOOL_A_STATS_GRP_SS_ID ETHTOOL_A_STATS_GRP_STAT ETHTOOL_A_STATS_GRP_HIST_RX ETHTOOL_A_STATS_GRP_HIST_TX ETHTOOL_A_FEC_STAT_UNSPEC ETHTOOL_A_FEC_STAT_PAD ETHTOOL_A_FEC_STAT_CORRECTED ETHTOOL_A_FEC_STAT_UNCORR ETHTOOL_A_FEC_STAT_CORR_BITS ETHTOOL_A_TUNNEL_UDP_UNSPEC ETHTOOL_A_TUNNEL_UDP_TABLE ETHTOOL_A_PAUSE_STAT_PAD RATE_MATCH_NONE RATE_MATCH_PAUSE RATE_MATCH_CRS RATE_MATCH_OPEN_LOOP ETHTOOL_A_BITSET_UNSPEC ETHTOOL_A_BITSET_NOMASK ETHTOOL_A_BITSET_SIZE ETHTOOL_A_BITSET_BITS ETHTOOL_A_BITSET_VALUE ETHTOOL_A_BITSET_MASK ETHTOOL_A_STRINGSETS_UNSPEC ETHTOOL_A_HEADER_UNSPEC ETHTOOL_A_HEADER_DEV_INDEX ETHTOOL_A_HEADER_DEV_NAME ETHTOOL_A_HEADER_FLAGS CTRL_ATTR_UNSPEC CTRL_ATTR_FAMILY_ID CTRL_ATTR_FAMILY_NAME CTRL_ATTR_VERSION CTRL_ATTR_HDRSIZE CTRL_ATTR_MAXATTR CTRL_ATTR_OPS CTRL_ATTR_MCAST_GROUPS CTRL_ATTR_POLICY CTRL_ATTR_OP_POLICY CTRL_ATTR_OP ETHTOOL_A_CABLE_TEST_NTF_NEST ETHTOOL_A_MM_UNSPEC ETHTOOL_A_MM_HEADER ETHTOOL_A_MM_PMAC_ENABLED ETHTOOL_A_MM_TX_ENABLED ETHTOOL_A_MM_TX_ACTIVE ETHTOOL_A_MM_TX_MIN_FRAG_SIZE ETHTOOL_A_MM_RX_MIN_FRAG_SIZE ETHTOOL_A_MM_VERIFY_ENABLED ETHTOOL_A_MM_VERIFY_STATUS ETHTOOL_A_MM_VERIFY_TIME ETHTOOL_A_MM_MAX_VERIFY_TIME ETHTOOL_A_MM_STATS ETHTOOL_A_PLCA_UNSPEC ETHTOOL_A_PLCA_HEADER ETHTOOL_A_PLCA_VERSION ETHTOOL_A_PLCA_ENABLED ETHTOOL_A_PLCA_STATUS ETHTOOL_A_PLCA_NODE_CNT ETHTOOL_A_PLCA_NODE_ID ETHTOOL_A_PLCA_TO_TMR ETHTOOL_A_PLCA_BURST_CNT ETHTOOL_A_PLCA_BURST_TMR ETHTOOL_A_RSS_UNSPEC ETHTOOL_A_RSS_HEADER ETHTOOL_A_RSS_CONTEXT ETHTOOL_A_RSS_HFUNC ETHTOOL_A_RSS_INDIR ETHTOOL_A_RSS_HKEY ETHTOOL_A_PSE_UNSPEC ETHTOOL_A_PSE_HEADER ETHTOOL_A_MODULE_UNSPEC ETHTOOL_A_MODULE_HEADER ETHTOOL_A_MODULE_POWER_MODE ETHTOOL_A_PHC_VCLOCKS_UNSPEC ETHTOOL_A_PHC_VCLOCKS_HEADER ETHTOOL_A_PHC_VCLOCKS_NUM ETHTOOL_A_PHC_VCLOCKS_INDEX ETHTOOL_A_STATS_UNSPEC ETHTOOL_A_STATS_PAD ETHTOOL_A_STATS_HEADER ETHTOOL_A_STATS_GROUPS ETHTOOL_A_STATS_GRP ETHTOOL_A_MODULE_EEPROM_PAGE ETHTOOL_A_MODULE_EEPROM_BANK ETHTOOL_A_MODULE_EEPROM_DATA ETHTOOL_A_FEC_UNSPEC ETHTOOL_A_FEC_HEADER ETHTOOL_A_FEC_MODES ETHTOOL_A_FEC_AUTO ETHTOOL_A_FEC_ACTIVE ETHTOOL_A_FEC_STATS ETHTOOL_A_TUNNEL_INFO_UNSPEC ETHTOOL_A_TUNNEL_INFO_HEADER ETHTOOL_A_CABLE_TEST_TDR_CFG ETHTOOL_A_CABLE_TEST_UNSPEC ETHTOOL_A_CABLE_TEST_HEADER ETHTOOL_A_TSINFO_UNSPEC ETHTOOL_A_TSINFO_HEADER ETHTOOL_A_TSINFO_TIMESTAMPING ETHTOOL_A_TSINFO_TX_TYPES ETHTOOL_A_TSINFO_RX_FILTERS ETHTOOL_A_TSINFO_PHC_INDEX ETHTOOL_A_EEE_UNSPEC ETHTOOL_A_EEE_HEADER ETHTOOL_A_EEE_MODES_OURS ETHTOOL_A_EEE_MODES_PEER ETHTOOL_A_EEE_ACTIVE ETHTOOL_A_EEE_ENABLED ETHTOOL_A_EEE_TX_LPI_ENABLED ETHTOOL_A_EEE_TX_LPI_TIMER ETHTOOL_A_PAUSE_UNSPEC ETHTOOL_A_PAUSE_HEADER ETHTOOL_A_PAUSE_AUTONEG ETHTOOL_A_PAUSE_RX ETHTOOL_A_PAUSE_TX ETHTOOL_A_PAUSE_STATS ETHTOOL_A_COALESCE_UNSPEC ETHTOOL_A_COALESCE_HEADER ETHTOOL_A_COALESCE_RX_USECS ETHTOOL_A_COALESCE_TX_USECS ETHTOOL_A_CHANNELS_UNSPEC ETHTOOL_A_CHANNELS_HEADER ETHTOOL_A_CHANNELS_RX_MAX ETHTOOL_A_CHANNELS_TX_MAX ETHTOOL_A_CHANNELS_OTHER_MAX ETHTOOL_A_CHANNELS_RX_COUNT ETHTOOL_A_CHANNELS_TX_COUNT ETHTOOL_A_RINGS_UNSPEC ETHTOOL_A_RINGS_HEADER ETHTOOL_A_RINGS_RX_MAX ETHTOOL_A_RINGS_RX_MINI_MAX ETHTOOL_A_RINGS_RX_JUMBO_MAX ETHTOOL_A_RINGS_TX_MAX ETHTOOL_A_RINGS_RX ETHTOOL_A_RINGS_RX_MINI ETHTOOL_A_RINGS_RX_JUMBO ETHTOOL_A_RINGS_TX ETHTOOL_A_RINGS_RX_BUF_LEN ETHTOOL_A_RINGS_CQE_SIZE ETHTOOL_A_RINGS_TX_PUSH ETHTOOL_A_RINGS_RX_PUSH ETHTOOL_A_PRIVFLAGS_UNSPEC ETHTOOL_A_PRIVFLAGS_HEADER ETHTOOL_A_PRIVFLAGS_FLAGS ETHTOOL_A_FEATURES_UNSPEC ETHTOOL_A_FEATURES_HEADER ETHTOOL_A_FEATURES_HW ETHTOOL_A_FEATURES_WANTED ETHTOOL_A_FEATURES_ACTIVE ETHTOOL_A_FEATURES_NOCHANGE ETHTOOL_A_WOL_UNSPEC ETHTOOL_A_WOL_HEADER ETHTOOL_A_WOL_MODES ETHTOOL_A_WOL_SOPASS ETHTOOL_A_DEBUG_UNSPEC ETHTOOL_A_DEBUG_HEADER ETHTOOL_A_DEBUG_MSGMASK ETHTOOL_A_LINKSTATE_UNSPEC ETHTOOL_A_LINKSTATE_HEADER ETHTOOL_A_LINKSTATE_LINK ETHTOOL_A_LINKSTATE_SQI ETHTOOL_A_LINKSTATE_SQI_MAX ETHTOOL_A_LINKSTATE_EXT_STATE ETHTOOL_A_LINKMODES_UNSPEC ETHTOOL_A_LINKMODES_HEADER ETHTOOL_A_LINKMODES_AUTONEG ETHTOOL_A_LINKMODES_OURS ETHTOOL_A_LINKMODES_PEER ETHTOOL_A_LINKMODES_SPEED ETHTOOL_A_LINKMODES_DUPLEX ETHTOOL_A_LINKMODES_LANES ETHTOOL_A_LINKINFO_UNSPEC ETHTOOL_A_LINKINFO_HEADER ETHTOOL_A_LINKINFO_PORT ETHTOOL_A_LINKINFO_PHYADDR ETHTOOL_A_LINKINFO_TP_MDIX ETHTOOL_A_STRSET_UNSPEC ETHTOOL_A_STRSET_HEADER ETHTOOL_A_STRSET_STRINGSETS ETHTOOL_A_STRSET_COUNTS_ONLY IFLA_UNSPEC IFLA_ADDRESS IFLA_BROADCAST IFLA_IFNAME IFLA_MTU IFLA_LINK IFLA_QDISC IFLA_STATS IFLA_COST IFLA_PRIORITY IFLA_MASTER IFLA_WIRELESS IFLA_PROTINFO IFLA_TXQLEN IFLA_MAP IFLA_WEIGHT IFLA_OPERSTATE IFLA_LINKMODE IFLA_LINKINFO IFLA_NET_NS_PID IFLA_IFALIAS IFLA_NUM_VF IFLA_VFINFO_LIST IFLA_STATS64 IFLA_VF_PORTS IFLA_PORT_SELF IFLA_AF_SPEC IFLA_GROUP IFLA_NET_NS_FD IFLA_EXT_MASK IFLA_PROMISCUITY IFLA_NUM_TX_QUEUES IFLA_NUM_RX_QUEUES IFLA_CARRIER IFLA_PHYS_PORT_ID IFLA_CARRIER_CHANGES IFLA_PHYS_SWITCH_ID IFLA_LINK_NETNSID IFLA_PHYS_PORT_NAME IFLA_PROTO_DOWN IFLA_GSO_MAX_SEGS IFLA_GSO_MAX_SIZE IFLA_PAD IFLA_XDP IFLA_EVENT IFLA_NEW_NETNSID IFLA_IF_NETNSID IFLA_CARRIER_UP_COUNT IFLA_CARRIER_DOWN_COUNT IFLA_NEW_IFINDEX IFLA_MIN_MTU IFLA_MAX_MTU IFLA_PROP_LIST IFLA_ALT_IFNAME IFLA_PERM_ADDRESS tqp_intr_ctrl tqp_intr_gl0 tqp_intr_gl1 tqp_intr_gl2 tqp_intr_rl ring_rx_addr_l ring_rx_addr_h ring_rx_bd_num ring_rx_bd_length ring_rx_merge_en ring_rx_tail ring_rx_head ring_rx_fbd_num ring_rx_offset ring_rx_fbd_offset ring_rx_stash ring_rx_bd_err ring_tx_addr_l ring_tx_addr_h ring_tx_bd_num ring_tx_priority ring_tx_tc ring_tx_merge_en ring_tx_tail ring_tx_head ring_tx_fbd_num ring_tx_offset ring_tx_ebd_num ring_tx_ebd_offset ring_tx_bd_err ring_en misc_vector_base gro_en comm_nic_csq_baseaddr_l comm_nic_csq_baseaddr_h comm_nic_csq_depth comm_nic_csq_tail comm_nic_csq_head comm_nic_crq_baseaddr_l comm_nic_crq_baseaddr_h comm_nic_crq_depth comm_nic_crq_tail comm_nic_crq_head comm_vector0_cmdq_src comm_vector0_cmdq_state comm_cmdq_intr_en comm_cmdq_intr_gen oq_index queue_cnt q_num rcb_cfg_rx_ring_tail rcb_cfg_rx_ring_head rcb_cfg_rx_ring_fbdnum rcb_cfg_rx_ring_offset rcb_cfg_rx_ring_fbdoffset rcb_cfg_rx_ring_pktnum_record rcb_cfg_tx_ring_tail rcb_cfg_tx_ring_head rcb_cfg_tx_ring_fbdnum rcb_cfg_tx_ring_offset rcb_cfg_tx_ring_ebdnum fsm_dfx_st0 fsm_dfx_st1 fsm_dfx_st2 fifo_dfx_st0 fifo_dfx_st1 fifo_dfx_st2 fifo_dfx_st3 fifo_dfx_st4 fifo_dfx_st5 fifo_dfx_st6 fifo_dfx_st7 fifo_dfx_st8 fifo_dfx_st9 fifo_dfx_st10 fifo_dfx_st11 q_credit_vld_0 q_credit_vld_1 q_credit_vld_2 q_credit_vld_3 q_credit_vld_4 q_credit_vld_5 q_credit_vld_6 q_credit_vld_7 q_credit_vld_8 q_credit_vld_9 q_credit_vld_10 q_credit_vld_11 q_credit_vld_12 q_credit_vld_13 q_credit_vld_14 q_credit_vld_15 q_credit_vld_16 q_credit_vld_17 q_credit_vld_18 q_credit_vld_19 q_credit_vld_20 q_credit_vld_21 q_credit_vld_22 q_credit_vld_23 q_credit_vld_24 q_credit_vld_25 q_credit_vld_26 q_credit_vld_27 q_credit_vld_28 q_credit_vld_29 q_credit_vld_30 q_credit_vld_31 gro_bd_serr_cnt gro_context_serr_cnt rx_stash_cfg_serr_cnt rcb_tx_mem_serr_cnt gro_bd_merr_cnt gro_context_merr_cnt rx_stash_cfg_merr_cnt rcb_tx_mem_merr_cnt drop_from_prt_pkt_cnt drop_from_host_pkt_cnt drop_tx_vlan_proc_cnt drop_mng_cnt drop_fd_cnt drop_no_dst_cnt drop_mc_mbid_full_cnt drop_sc_filtered ppp_mc_drop_pkt_cnt drop_pt_cnt drop_mac_anti_spoof_cnt drop_ig_vfv_cnt drop_ig_prtv_cnt drop_cnm_pfc_pause_cnt drop_torus_tc_cnt drop_torus_lpbk_cnt ppp_hfs_sts ppp_mc_rslt_sts ppp_p3u_sts ppp_umv_sts_0 ppp_umv_sts_1 ppp_vfv_sts ppp_gro_key_cnt ppp_gro_info_cnt ppp_gro_drop_cnt ppp_gro_out_cnt ppp_gro_key_match_data_cnt ppp_gro_key_match_tcam_cnt ppp_gro_info_match_cnt ppp_gro_free_entry_cnt ppp_gro_inner_dfx_signal send_mc_from_host_cnt ssu_mc_rd_cnt ssu_mc_drop_cnt ssu_mc_rd_pkt_cnt ppp_mc_2host_pkt_cnt ppp_mc_2prt_pkt_cnt ntsnos_pkt_cnt ntup_pkt_cnt ntlcl_pkt_cnt nttgt_pkt_cnt rtns_pkt_cnt rtlpbk_pkt_cnt nr_pkt_cnt rr_pkt_cnt mng_tbl_hit_cnt fd_tbl_hit_cnt fd_lkup_cnt bc_hit_cnt um_tbl_uc_hit_cnt um_tbl_mc_hit_cnt um_tbl_snq_hit_cnt fwd_bonding_hit_cnt promis_tbl_hit_cnt get_tunl_pkt_cnt get_bmc_pkt_cnt send_uc_prt2bmc_pkt_cnt send_uc_host2bmc_pkt_cnt send_uc_bmc2host_pkt_cnt send_uc_bmc2prt_pkt_cnt ppp_mc_2bmc_pkt_cnt rx_default_host_hit_cnt lan_pair_cnt um_tbl_mc_hit_pkt_cnt mta_tbl_hit_pkt_cnt promis_tbl_hit_pkt_cnt lge_igu_afifo_dfx_0 lge_igu_afifo_dfx_1 lge_igu_afifo_dfx_2 lge_igu_afifo_dfx_3 lge_igu_afifo_dfx_4 lge_igu_afifo_dfx_5 lge_igu_afifo_dfx_6 lge_igu_afifo_dfx_7 lge_egu_afifo_dfx_0 lge_egu_afifo_dfx_1 lge_egu_afifo_dfx_2 lge_egu_afifo_dfx_3 lge_egu_afifo_dfx_4 lge_egu_afifo_dfx_5 lge_egu_afifo_dfx_6 lge_egu_afifo_dfx_7 cge_igu_afifo_dfx_0 cge_igu_afifo_dfx_1 cge_egu_afifo_dfx_0 cge_egu_afifo_dfx_1 ncsi_egu_tx_fifo_sts ncsi_pause_status ncsi_rx_ctrl_dmac_err_cnt ncsi_rx_ctrl_smac_err_cnt ncsi_rx_ctrl_cks_err_cnt ncsi_rx_ctrl_pkt_cnt ncsi_rx_pt_dmac_err_cnt ncsi_rx_pt_smac_err_cnt ncsi_rx_pt_pkt_cnt ncsi_rx_fcs_err_cnt ncsi_tx_ctrl_dmac_err_cnt ncsi_tx_ctrl_smac_err_cnt ncsi_tx_ctrl_pkt_cnt ncsi_tx_pt_dmac_err_cnt ncsi_tx_pt_smac_err_cnt ncsi_tx_pt_pkt_cnt ncsi_tx_pt_pkt_trun_cnt ncsi_tx_pt_pkt_err_cnt ncsi_tx_ctrl_pkt_err_cnt ncsi_rx_ctrl_pkt_trun_cnt ncsi_rx_ctrl_pkt_cflit_cnt ncsi_mac_rx_octets_ok ncsi_mac_rx_octets_bad ncsi_mac_rx_uc_pkts ncsi_mac_rx_mc_pkts ncsi_mac_rx_bc_pkts ncsi_mac_rx_pkts_64octets ncsi_mac_rx_fcs_errors ncsi_mac_rx_long_errors ncsi_mac_rx_jabber_errors ncsi_mac_rx_runt_err_cnt ncsi_mac_rx_short_err_cnt ncsi_mac_rx_filt_pkt_cnt ncsi_mac_rx_octets_total_filt ncsi_mac_tx_octets_ok ncsi_mac_tx_octets_bad ncsi_mac_tx_uc_pkts ncsi_mac_tx_mc_pkts ncsi_mac_tx_bc_pkts ncsi_mac_tx_pkts_64octets ncsi_mac_tx_underrun ncsi_mac_tx_crc_error ncsi_mac_tx_pause_frames ncsi_mac_rx_pad_pkts ncsi_mac_rx_pause_frames rpu_rx_pkt_drop_cnt buf_wait_timeout buf_wait_timeout_qid prt_id igu_rx_err_pkt igu_rx_no_sof_pkt egu_tx_1588_short_pkt egu_tx_1588_pkt egu_tx_err_pkt igu_rx_out_l2_pkt igu_rx_out_l3_pkt igu_rx_out_l4_pkt igu_rx_in_l2_pkt igu_rx_in_l3_pkt igu_rx_in_l4_pkt igu_rx_el3e_pkt igu_rx_el4e_pkt igu_rx_l3e_pkt igu_rx_l4e_pkt igu_rx_rocee_pkt igu_rx_out_udp0_pkt igu_rx_in_udp0_pkt mul_car_drop_pkt_cnt bro_car_drop_pkt_cnt igu_rx_oversize_pkt igu_rx_undersize_pkt igu_rx_out_all_pkt igu_tx_out_all_pkt igu_rx_uni_pkt igu_rx_multi_pkt igu_rx_broad_pkt egu_tx_out_all_pkt egu_tx_uni_pkt egu_tx_multi_pkt egu_tx_broad_pkt igu_tx_key_num igu_rx_non_tun_pkt igu_rx_tun_pkt packet_tc_curr_buffer_cnt_0 packet_tc_curr_buffer_cnt_1 packet_tc_curr_buffer_cnt_2 packet_tc_curr_buffer_cnt_3 packet_tc_curr_buffer_cnt_4 packet_tc_curr_buffer_cnt_5 packet_tc_curr_buffer_cnt_6 packet_tc_curr_buffer_cnt_7 rx_packet_out_cnt tx_packet_in_cnt roc_rx_packet_in_cnt roc_tx_packet_out_cnt rx_packet_tc_in_cnt_0 rx_packet_tc_in_cnt_1 rx_packet_tc_in_cnt_2 rx_packet_tc_in_cnt_3 rx_packet_tc_in_cnt_4 rx_packet_tc_in_cnt_5 rx_packet_tc_in_cnt_6 rx_packet_tc_in_cnt_7 rx_packet_tc_out_cnt_0 rx_packet_tc_out_cnt_1 rx_packet_tc_out_cnt_2 rx_packet_tc_out_cnt_3 rx_packet_tc_out_cnt_4 rx_packet_tc_out_cnt_5 rx_packet_tc_out_cnt_6 rx_packet_tc_out_cnt_7 tx_packet_tc_in_cnt_0 tx_packet_tc_in_cnt_1 tx_packet_tc_in_cnt_2 tx_packet_tc_in_cnt_3 tx_packet_tc_in_cnt_4 tx_packet_tc_in_cnt_5 tx_packet_tc_in_cnt_6 tx_packet_tc_in_cnt_7 tx_packet_tc_out_cnt_0 tx_packet_tc_out_cnt_1 tx_packet_tc_out_cnt_2 tx_packet_tc_out_cnt_3 tx_packet_tc_out_cnt_4 tx_packet_tc_out_cnt_5 tx_packet_tc_out_cnt_6 tx_packet_tc_out_cnt_7 ssu_ets_port_status ssu_ets_tcg_status ssu_bp_status_0 ssu_bp_status_1 ssu_bp_status_2 ssu_bp_status_3 ssu_bp_status_4 ssu_bp_status_5 ssu_mac_tx_pfc_ind mac_ssu_rx_pfc_ind btmp_ageing_st_b0 btmp_ageing_st_b1 btmp_ageing_st_b2 full_drop_num part_drop_num ppp_key_drop_num ppp_rlt_drop_num lo_pri_unicast_rlt_drop_num hi_pri_multicast_rlt_drop_num lo_pri_multicast_rlt_drop_num ncsi_packet_curr_buffer_cnt ssu_mb_rd_rlt_drop_cnt ssu_ppp_mac_key_num ssu_ppp_host_key_num ppp_ssu_mac_rlt_num ppp_ssu_host_rlt_num ncsi_rx_packet_in_cnt ncsi_tx_packet_out_cnt ssu_key_drop_num mb_uncopy_num bank_unbalance_drop_cnt bank_unbalance_rx_drop_cnt nic_l2_err_drop_pkt_cnt roc_l2_err_drop_pkt_cnt nic_l2_err_drop_pkt_cnt_rx roc_l2_err_drop_pkt_cnt_rx rx_oq_glb_drop_pkt_cnt lo_pri_unicast_cur_cnt hi_pri_multicast_cur_cnt lo_pri_multicast_cur_cnt bp_cpu_state dfx_msix_info_nic_0 dfx_msix_info_nic_1 dfx_msix_info_nic_2 dfx_msix_info_nic_3 dfx_msix_info_roc_0 dfx_msix_info_roc_1 dfx_msix_info_roc_2 dfx_msix_info_roc_3 ppp_get_rx_pkt_cnt ppp_get_tx_pkt_cnt ppp_send_uc_prt2host_pkt_cnt ppp_send_uc_prt2prt_pkt_cnt ppp_send_uc_host2host_pkt_cnt ppp_send_uc_host2prt_pkt_cnt ppp_send_mc_from_prt_cnt ssu_common_err_int ssu_port_based_err_int ssu_fifo_overflow_int ssu_ets_tcg_int ssu_mac_rx_pfc_ind ssu_rx_oq_drop_pkt_cnt ssu_tx_oq_drop_pkt_cnt pf_other_int misc_reset_sts misc_vector_int_sts global_reset fun_rst_ing comm_cmdq_intr_sts SRC_PORT SRC_IP DEST_PORT DEST_IP TCP_UDP MC_TREG_SMEM_ROW TMFT_VLAN_ID TMFT_SRC_MAC TMFT_WILDCARD_MATCH TMFT_TXQ_ID IT_QUEUE TX_PACE TIMER_MODE RELOAD_TIMER_VAL HOST_NOTIFY_MODE INT_PEND INT_ARMD TIMER_Q_EN RMFT_VLAN_ID RMFT_DEST_MAC RMFT_WILDCARD_MATCH RMFT_RXQ_ID RMFT_IP_OVERRIDE RMFT_SCATTER_EN RMFT_RSS_EN BUF_OWNER_ID_FBUF BUF_ADR_FBUF BUF_ADR_REGION IP_DAT_BUF_SIZE BUF_FULL_UNUSED EVQ_BUF_BASE_ID EVQ_SIZE EVQ_EN EVQ_NXT_WPTR EVQ_DOS_PROTECT_EN EVQ_WKUP_OR_INT_EN EVQ_RPTR_IGN FLUSH LABEL OWNER BUF_BASE SW_WPTR DC_HW_RPTR HDIG DDIG !TCP_CHKSM !IP_CHKSM !NON_IP_DROP IP_FILT ETH_FILT Q_MASK_WIDTH PREF_ACT RX_RESET HDR_SPLIT TX_SRC_MAC_ADR_0 TX_SRC_MAC_ADR_1 TX_IP_SRC_ADR_0 TX_IPFIL_MASK_0 TX_IP_SRC_ADR_1 TX_IPFIL_MASK_1 MC_DOORBELL_H MC_DOORBELL_L XX_DTXA XX_DTXB XX_DTXC XX_DTXD XX_DEQA XX_DEQB XX_DEQC XX_DEQD XX_LPBKA XX_LPBKB XX_LPBKC XX_LPBKD XX_LODRVA XX_HIDRVA XX_LODRVB XX_HIDRVB XX_LODRVC XX_HIDRVC XX_LODRVD XX_HIDRVD XX_TERMADJ0 XX_TERMADJ1 XX_RST_XX_EN XX_RSTXGXSTX_EN XX_RSTXGXSRX_EN XX_RESETA_EN XX_RESETB_EN XX_RESETC_EN XX_RESETD_EN XX_RSTPLLAB_EN XX_RSTPLLCD_EN XX_PWRDNA_EN XX_PWRDNB_EN XX_PWRDNC_EN XX_PWRDND_EN XX_SD_RST_ACT XX_RSTXGXSTX_SIG XX_RSTXGXSRX_SIG XX_RESETA_SIG XX_RESETB_SIG XX_RESETC_SIG XX_RESETD_SIG XX_RSTPLLAB_SIG XX_RSTPLLCD_SIG XX_SIM_MODE XX_PWRDNA_SIG XX_PWRDNB_SIG XX_PWRDNC_SIG XX_PWRDND_SIG XM_MAX_RX_FRM_SIZE_LO XM_MAX_RX_FRM_SIZE_HI XM_PAD_CHAR XM_MAX_TX_FRM_SIZE_LO XM_MAX_TX_FRM_SIZE_HI XM_TX_JUMBO_MODE XM_RX_PAUSE_CNT XM_TX_PAUSE_CNT XM_DIS_FCNTL XM_XMIT_PAUSE XM_ZPAUSE XM_REJ_CNTL_MCAST XM_REJ_CNTL_UCAST XM_MCNTL_PASS XM_TX_MAC_STAT XM_RX_MAC_STAT XM_PAUSE_TIME XM_MSK_LCLFLT XM_MSK_RMTFLT XM_MSK_PRMBLE_ERR XM_MSK_STAT_CNTR_OF XM_MSK_STAT_CNTR_HF XM_MSK_STA_INTR XM_RX_RST XM_RXEN XM_RX_PRMBL XM_RXCRC XM_AUTO_DEPAD XM_ACPT_ALL_UCAST XM_ACPT_ALL_MCAST XM_REJ_BCAST XM_PASS_PRMBLE_ERR XM_PASS_CRC_ERR XM_PASS_LENERR XM_TX_RST XM_TXEN XM_TX_PRMBL XM_AUTO_PAD XM_EDRC XM_TXCRC XM_FCNTL XM_IPG XM_TX_PROG XM_CORE_RST XM_INTCLR_MODE XM_WAN_MODE XM_RX_JUMBO_MODE XM_TX_STAT_EN XM_RX_STAT_EN XM_DEBUG_MODE XM_RMTFLT_GEN XM_ADR_HI XM_ADR_LO TX_MAC_QID_SEL TX_DROP_CTR_CLR TX_SRC_FLTR_EN TX_SRC_DROP_CTR GMF_HSTFLTRFRMDC GMF_HSTDRPLT64 GMF_CFGBYTMODE GMF_HSTSRFULLCLR GMF_SRFULL GMF_CFGHDPLX GMF_HSTFLTRFRM GMF_CFGFTTH GMF_CFGHWMFT GMF_CFGLWM GMF_CFGHWM GMF_CFGXOFFRTX GMF_CFGFRTH GMF_HSTRSTWT GMF_HSTRSTSR GMF_HSTRSTFR GMF_HSTRSTST GMF_HSTRSTFT GMF_WTMENREQ GMF_SRFENREQ GMF_FRFENREQ GMF_STFENREQ GMF_FTFENREQ GMF_WTMENRPLY GMF_SRFENRPLY GMF_FRFENRPLY GMF_STFENRPLY GMF_FTFENRPLY GM_ADR_B5 GM_ADR_B4 GM_ADR_B3 GM_ADR_B2 GM_ADR_B1 GM_ADR_B0 GM_MAX_FLEN GM_FD GM_CRC_EN GM_PAD_CRC_EN GM_LEN_CHK GM_HUGE_FRM_EN GM_IF_MODE GM_PAMBL_LEN GM_TX_EN GM_SYNC_TXEN GM_RX_EN GM_SYNC_RXEN GM_TX_FC_EN GM_RX_FC_EN GM_LOOP GM_RST_TX_FUNC GM_RST_RX_FUNC GM_RST_TX_MAC_CTL GM_RST_RX_MAC_CTL GM_SIM_RST GM_SW_RST MAC_MCAST_HASH1 MAC_MCAST_HASH0 XG_PHY_INT_MASK XFP_PHY_INT_MASK XG_PHY_INT_POL_SEL XFP_PHY_INT_POL_SEL MAC_SPEED MAC_LINK_STATUS MAC_UC_PROM MAC_BCAD_ACPT MAC_XG_DISTXCRC TXFIFO_DRAIN_EN MAC_XOFF_VAL MAC_STAT_DMA_ADR MAC_STAT_DMA_CMD MD_DEV_ADR MD_PRT_ADR MD_PHY_ADR MD_WRC MD_RDC MD_RIC MD_PRSP MD_GC MD_INT_CLR MD_PL MD_PT MD_ADDR_CMD MD_WR_EN_CMD MD_RD_EN_CMD MD_RXD MD_TXD TX_IPFIL0_PORT_EN TX_IPFIL1_PORT_EN TX_IPFIL2_PORT_EN TX_IPFIL3_PORT_EN TX_IPFIL4_PORT_EN TX_IPFIL5_PORT_EN TX_IPFIL6_PORT_EN TX_IPFIL7_PORT_EN TX_IPFIL8_PORT_EN TX_IPFIL9_PORT_EN TX_IPFIL10_PORT_EN TX_IPFIL11_PORT_EN TX_IPFIL12_PORT_EN TX_IPFIL13_PORT_EN TX_IPFIL14_PORT_EN TX_IPFIL15_PORT_EN TX_IPFIL16_PORT_EN TX_IPFIL17_PORT_EN TX_IPFIL18_PORT_EN TX_IPFIL19_PORT_EN TX_IPFIL20_PORT_EN TX_IPFIL21_PORT_EN TX_IPFIL22_PORT_EN TX_IPFIL23_PORT_EN TX_IPFIL24_PORT_EN TX_IPFIL25_PORT_EN TX_IPFIL26_PORT_EN TX_IPFIL27_PORT_EN TX_IPFIL28_PORT_EN TX_IPFIL29_PORT_EN TX_IPFIL30_PORT_EN TX_IPFIL31_PORT_EN TX_MADR0_FIL_EN TX_VLAN0 TX_VLAN0_PORT0_EN TX_VLAN0_PORT1_EN TX_VLAN1 TX_VLAN1_PORT0_EN TX_VLAN1_PORT1_EN TX_VLAN2 TX_VLAN2_PORT0_EN TX_VLAN2_PORT1_EN TX_VLAN3 TX_VLAN3_PORT0_EN TX_VLAN3_PORT1_EN TX_VLAN4 TX_VLAN4_PORT0_EN TX_VLAN4_PORT1_EN TX_VLAN5 TX_VLAN5_PORT0_EN TX_VLAN5_PORT1_EN TX_VLAN6 TX_VLAN6_PORT0_EN TX_VLAN6_PORT1_EN TX_VLAN7 TX_VLAN7_PORT0_EN TX_VLAN7_PORT1_EN TX_VLAN_EN TX_PACE_BIN_TH TX_PACE_FB_BASE TX_PACE_SB_AF TX_PACE_SB_NOT_AF TX_MAX_PREF TX_MAX_CPL TX_IP_DIS TX_FLUSH_MIN_LEN_EN TX_TCP_DIS TX_DMA_SPACER TX_DMA_FF_THR TX_DIS_NON_IP_EV TX_ONE_PKT_PER_Q TX_PREF_THRESHOLD TX_ONLY1TAG TX_PREF_WD_TMR TX_PREF_SPACER TX_XP_TIMER TX_RX_SPACER_EN TX_PS_EVT_DIS TX_SOFT_EVT_EN TX_DROP_ABORT_EN TX_RX_SPACER TX_DMAQ_ST TX_DMAR_ST_P0 TX_D_FF_FULL_P0 TX_PUSH_CHK_DIS TX_PUSH_EN TX_RD_COMP_TMR TX_PREF_AGE_CNT TX_EVT_CNT TX_IP_ID_REP_EN TX_NON_IP_DROP_DIS TX_OWNERR_CTL TX_P1_PRI_EN TX_NO_EOP_DISC_EN TX_IP_ID_P0_OFS TX_FILTER_EN_BIT TX_VLAN_MATCH_ETHERTYPE_RANGE TX_FILTER_TEST_MODE_BIT TX_CONT_LOOKUP_THRESH_RANGE TX_Q_CHKSM_DIS_0_31 TX_Q_CHKSM_DIS_32_63 TX_Q_CHKSM_DIS_64_95 TX_Q_CHKSM_DIS_96_127 TX_DC_SIZE RX_RSS_IPV6_TKEY_HI RX_RSS_IPV6_TCP_SUPPRESS RX_RSS_IPV6_IP_THASH_ENABLE RX_RSS_IPV6_THASH_ENABLE RX_RSS_IPV6_TKEY_MID RX_RSS_IPV6_TKEY_LO RX_MAX_LU_LAT RX_MAX_PF_LAT RX_SELF_RST_EN RX_NODESC_WAIT_DIS RX_SW_RST_REG RX_ISCSI_DIS RX_RSS_TKEY_LO RX_RSS_TKEY_HI RX_DC_PF_LWM RX_DC_PF_HWM RX_DC_SIZE RX_MAX_PF TCP_FULL_SRCH_LIMIT TCP_WILD_SRCH_LIMIT UDP_WILD_SRCH_LIMIT NUM_KER UDP_FULL_SRCH_LIMIT SCATTER_ENBL_NO_MATCH_Q UNICAST_NOMATCH_IP_OVERRIDE UNICAST_NOMATCH_RSS_ENABLED UNICAST_NOMATCH_Q_ID MULTICAST_NOMATCH_IP_OVERRIDE MULTICAST_NOMATCH_RSS_ENABLED MULTICAST_NOMATCH_Q_ID RX_VLAN_MATCH_ETHERTYPE RX_FILTER_ALL_VLAN_ETHERTYPES ETHERNET_FULL_SEARCH_LIMIT RX_XOFF_MAC_EN RX_XOFF_MAC_TH RX_XON_MAC_TH RX_USR_BUF_SIZE RX_XOFF_TX_TH RX_XON_TX_TH RX_OWNERR_CTL RX_PCI_BURST_SIZE RX_RDW_PATCH_EN RX_DESC_PUSH_EN RX_HASH_INSRT_HDR RX_HASH_ALG RX_IP_HASH RX_INGR_EN RX_TCP_SUP RX_PRE_RFF_IPG RX_HDR_SPLIT_HDR_BUF_SIZE RX_HDR_SPLIT_PLD_BUF_SIZE RX_HDR_SPLIT_EN RX_MIN_KBUF_SIZE FORCE_SRAM_SINGLE_ERR FORCE_SRAM_PERR FORCE_SRAM_DOUBLE_ERR SEC_INT BYPASS_ECC SRM_UPD_EVQ_ID SRM_BANK_SIZE SRM_NUM_BANK SRM_INIT_EN SRM_OOB_BUF_INTEN SRM_OOB_ADR_INTEN SRM_TX_DC_BASE_ADR SRM_RX_DC_BASE_ADR SRM_CLK_TMP_EN BUF_TBL_MODE EVQ_TM_REQ_CNT EVQ_INIT_REQ_CNT EVQ_WET_REQ_CNT EVQ_WU_REQ_CNT EVQ_RDY_CNT EVQ_CLR_REQ_CNT EVQ_UPD_REQ_CNT EVQ_ERR_REQ_CNT EVQ_CSR_REQ_CNT EVQ_EM_REQ_CNT EVQ_RX_REQ_CNT EVQ_TX_REQ_CNT EVQ_CNT_TOBIU EVQ_CNT_PRE_FIFO EVQ_FIFO_NOTAF_TH EVQ_FIFO_AF_TH EVQ_OWNERR_CTL RX_EVQ_WAKEUP_MASK PCIE_PRBSSEL PCIE_PRBSERRACK_L PCIE_PRBSERRACK_H PCIE_PRBSSYNC_L PCIE_PRBSSYNC_H PCIE_CTCDISABLE_L PCIE_CTCDISABLE_H PCIE_FASTINIT_L PCIE_FASTINIT_H PCIE_PRBSERRH0 PCIE_PRBSERR PCIE_PRBSERRCOUNT0_L PCIE_PRBSERRCOUNT0_H PCIE_DEQ0 PCIE_DEQ1 PCIE_DEQ2 PCIE_DEQ3 PCIE_DEQ4 PCIE_DEQ5 PCIE_DEQ6 PCIE_DEQ7 PCIE_DTX0 PCIE_DTX1 PCIE_DTX2 PCIE_DTX3 PCIE_DTX4 PCIE_DTX5 PCIE_DTX6 PCIE_DTX7 PCIE_LODRV PCIE_HIDRV PCIE_RXEQCTL_L PCIE_RXEQCTL_H PCIE_TXTERMADJ_L PCIE_TXTERMADJ_H PCIE_RXTERMADJ_L PCIE_RXTERMADJ_H PCIE_PARLPBK PCIE_LPBK PCIE_LPBKWDRV_L PCIE_LPBKWDRV_H PCIE_PARRESET_L PCIE_PARRESET_H PCIE_HIVMODE_L PCIE_HIVMODE_H PCIE_OFFSETEN_L PCIE_OFFSETEN_H PCIE_OFFSET PCIE_TESTSIG_L PCIE_TESTSIG_H CSR_SPARE_BITS MEM_PERR_EN_TX_DATA MEM_PERR_EN ALTERA_BUILD_VER CS_DEBUG_EN CS_PORT_NUM MEM_PERR_VEC MBIST_ERR MBIST_CORR FLS_EVQ_ID SWRST EXT_PHY_RST_DUR INT_RST_DUR RST_CS RST_SF RST_TX RST_RX RST_SR RST_EV RST_EM RST_XGTX RST_XGRX RST_PCIE_CORE RST_PCIE_NSTKY RST_PCIE_STKY RST_BIU RST_PCIX RST_PCIE_SD RST_XAUI_SD RST_EXT_PHY HOT_RST_CTL CS_RST_CTL EE_RST_CTL SR_RST_CTL EV_RST_CTL EM_RST_CTL XGTX_RST_CTL XGRX_RST_CTL PCIE_CORE_RST_CTL PCIE_NSTKY_RST_CTL PCIE_STKY_RST_CTL BIU_RST_CTL PCIX_RST_CTL PCIE_SD_RST_CTL XAUI_SD_RST_CTL EXT_PHY_RST_CTL GPIO0_PWRUP_VALUE GPIO1_PWRUP_VALUE GPIO2_PWRUP_VALUE GPIO3_PWRUP_VALUE GPIO4_PWRUP_VALUE GPIO5_PWRUP_VALUE GPIO6_PWRUP_VALUE GPIO7_PWRUP_VALUE GPIO0_IN GPIO1_IN GPIO2_IN GPIO3_IN GPIO4_IN GPIO5_IN GPIO6_IN GPIO7_IN GPIO0_OUT GPIO1_OUT GPIO2_OUT GPIO3_OUT GPIO4_OUT GPIO5_OUT GPIO6_OUT GPIO7_OUT GPIO0_OEN GPIO1_OEN GPIO2_OEN GPIO3_OEN GPIO4_OEN GPIO5_OEN USE_NIC_CLK CLK156_OUT_EN GPIO8_PWRUP_VALUE GPIO9_PWRUP_VALUE GPIO10_PWRUP_VALUE GPIO11_PWRUP_VALUE GPIO12_PWRUP_VALUE GPIO13_PWRUP_VALUE GPIO14_PWRUP_VALUE GPIO15_PWRUP_VALUE GPIO8_IN GPIO9_IN GPIO10_IN GPIO11_IN GPIO12_IN GPIO13_IN GPIO14_IN GPIO15_IN GPIO8_OUT GPIO9_OUT GPIO10_OUT GPIO11_OUT GPIO12_OUT GPIO13_OUT GPIO14_OUT GPIO15_OUT GPIO8_OEN GPIO9_OEN GPIO10_OEN GPIO11_OEN GPIO12_OEN GPIO13_OEN GPIO14_OEN GPIO15_OEN GPIO_PWRUP_VALUE2 GPIO_IN2 GPIO_OUT2 GPIO_PWRUP_VALUE3 GPIO_IN3 GPIO_OUT3 STRAP_PINS ATE_MODE EE_PRST SF_PRST ONCHIP_SRAM REVISION_ID EE_STRAP EE_STRAP_EN AER_DIS EE_VPD_EN EE_VPD_EN_AD9_MODE EE_VPD_DEV_SF_SEL EE_VPD_ACCESS_BLOCK EE_VPD_ACCESS_ON EE_VPD_AD_SIZE EE_VPD_LENGTH EE_VPD_BASE EE_VPD_WR_CMD_EN EE_VPDW_BASE EE_VPDW_LENGTH EE_EE_WR_TMR_VALUE EE_EE_CLOCK_DIV EE_VPD_WIP_POLL EE_SF_CLOCK_DIV EE_SF_FASTRD_EN EE_EXP_ROM_WINDOW_BASE EE_EXPROM_MASK EE_SPI_HDATA0 EE_SPI_HDATA1 EE_SPI_HDATA2 EE_SPI_HDATA3 EE_SPI_HADR_ADR EE_SPI_HADR_DUBYTE EE_SPI_HCMD_ENC EE_SPI_HCMD_ADBCNT EE_SPI_HCMD_DUBCNT EE_SPI_HCMD_READ EE_SPI_HCMD_DABCNT EE_SPI_HCMD_SF_SEL EE_WR_TIMER_ACTIVE EE_SPI_HCMD_CMD_EN DFLT_EVQ USREV_DIS TLP_TD TD_SEL ATTR_SEL TLP_EP US_DISABLE WD_TIMER INTA_VEC INTB_VEC TLP_ATTR TLP_TC POST_WR_MASK FC_BLOCKING_EN B2B_REQ_EN PE_EIDLE_DIS TX_RREQ_MASK_EN DOORBELL_DROP TRGT_MASK_ALL TX_MRG_TAGS PCIE_CPL_TIMEOUT_CTRL BDMRD_CPLF_FULL INT_ADR_CHAR NORM_INT_VEC_DIS_CHAR INT_ADR_KER NORM_INT_VEC_DIS_KER DRV_INT_EN_CHAR CHAR_INT_KER CHAR_INT_CHAR CHAR_INT_LEVE_SEL DRV_INT_EN_KER KER_INT_KER KER_INT_CHAR KER_INT_LEVE_SEL ADR_REGION0 ADR_REGION1 ADR_REGION2 ADR_REGION3 Unsupported cable Cable test failure Unsupported rate Serdes reference clock lost Serdes ALOS PCS did not acquire AM lock PCS did not get align_status FC FEC is not locked RS FEC is not locked KR frame lock not acquired KR link inhibit timeout Remote side is not ready yet No partner detected Ack not received Next page exchange failed FEC mismatch during override No HCD Link training failure Logical mismatch Bad signal integrity No cable Cable issue EEPROM issue Calibration failure Power budget exceeded Overheat Module Twisted Pair FIBRE Direct Attach Copper Other resolution error preferred master preferred slave forced master forced slave CTRL_CMD_UNSPEC CTRL_CMD_NEWFAMILY CTRL_CMD_DELFAMILY CTRL_CMD_GETFAMILY CTRL_CMD_NEWOPS CTRL_CMD_DELOPS CTRL_CMD_GETOPS CTRL_CMD_NEWMCAST_GRP CTRL_CMD_DELMCAST_GRP CTRL_CMD_GETMCAST_GRP CTRL_CMD_GETPOLICY ETHTOOL_MSG_KERNEL_NONE ETHTOOL_MSG_STRSET_GET_REPLY ETHTOOL_MSG_LINKINFO_NTF ETHTOOL_MSG_LINKMODES_NTF ETHTOOL_MSG_DEBUG_GET_REPLY ETHTOOL_MSG_DEBUG_NTF ETHTOOL_MSG_WOL_GET_REPLY ETHTOOL_MSG_WOL_NTF ETHTOOL_MSG_FEATURES_NTF ETHTOOL_MSG_PRIVFLAGS_NTF ETHTOOL_MSG_RINGS_GET_REPLY ETHTOOL_MSG_RINGS_NTF ETHTOOL_MSG_CHANNELS_NTF ETHTOOL_MSG_COALESCE_NTF ETHTOOL_MSG_PAUSE_GET_REPLY ETHTOOL_MSG_PAUSE_NTF ETHTOOL_MSG_EEE_GET_REPLY ETHTOOL_MSG_EEE_NTF ETHTOOL_MSG_TSINFO_GET_REPLY ETHTOOL_MSG_CABLE_TEST_NTF ETHTOOL_MSG_FEC_GET_REPLY ETHTOOL_MSG_FEC_NTF ETHTOOL_MSG_STATS_GET_REPLY ETHTOOL_MSG_MODULE_GET_REPLY ETHTOOL_MSG_MODULE_NTF ETHTOOL_MSG_PSE_GET_REPLY ETHTOOL_MSG_RSS_GET_REPLY ETHTOOL_MSG_PLCA_NTF ETHTOOL_MSG_MM_GET_REPLY ETHTOOL_MSG_MM_NTF ETHTOOL_MSG_USER_NONE ETHTOOL_MSG_STRSET_GET ETHTOOL_MSG_LINKINFO_GET ETHTOOL_MSG_LINKINFO_SET ETHTOOL_MSG_LINKMODES_GET ETHTOOL_MSG_LINKMODES_SET ETHTOOL_MSG_LINKSTATE_GET ETHTOOL_MSG_DEBUG_GET ETHTOOL_MSG_DEBUG_SET ETHTOOL_MSG_WOL_GET ETHTOOL_MSG_WOL_SET ETHTOOL_MSG_FEATURES_GET ETHTOOL_MSG_FEATURES_SET ETHTOOL_MSG_PRIVFLAGS_GET ETHTOOL_MSG_PRIVFLAGS_SET ETHTOOL_MSG_RINGS_GET ETHTOOL_MSG_RINGS_SET ETHTOOL_MSG_CHANNELS_GET ETHTOOL_MSG_CHANNELS_SET ETHTOOL_MSG_COALESCE_GET ETHTOOL_MSG_COALESCE_SET ETHTOOL_MSG_PAUSE_GET ETHTOOL_MSG_PAUSE_SET ETHTOOL_MSG_EEE_GET ETHTOOL_MSG_EEE_SET ETHTOOL_MSG_TSINFO_GET ETHTOOL_MSG_CABLE_TEST_ACT ETHTOOL_MSG_TUNNEL_INFO_GET ETHTOOL_MSG_FEC_GET ETHTOOL_MSG_FEC_SET ETHTOOL_MSG_MODULE_EEPROM_GET ETHTOOL_MSG_STATS_GET ETHTOOL_MSG_PHC_VCLOCKS_GET ETHTOOL_MSG_MODULE_GET ETHTOOL_MSG_MODULE_SET ETHTOOL_MSG_PSE_GET ETHTOOL_MSG_PSE_SET ETHTOOL_MSG_RSS_GET ETHTOOL_MSG_PLCA_GET_CFG ETHTOOL_MSG_PLCA_SET_CFG ETHTOOL_MSG_PLCA_GET_STATUS ETHTOOL_MSG_MM_GET ETHTOOL_MSG_MM_SET RTM_NEWLINK RTM_DELLINK RTM_GETLINK RTM_SETLINK cmdq_regs ring_regs tqp_intr_regs dfx_32_regs dfx_64_regs dfx_bios_common_regs dfx_ssu_0_regs dfx_ssu_1_regs dfx_igu_egu_regs dfx_rpu_0_regs dfx_rpu_1_regs dfx_ncsi_regs dfx_rtc_regs dfx_ppp_regs dfx_rcb_regs dfx_tqp_regs dfx_ssu_2_regs dfx_rpu_tnl free entry VLAN entry VLAN address entry invalid Blocking/Forwarding/Learning PL Signal integrity errors %llu DL Signal integrity errors TLP Signal integrity errors Link integrity TX TLP traffic rate RX TLP traffic rate TX DLLP traffic rate RX DLLP traffic rate Equalization Phase 0 time(ms) Equalization Phase 1 time(ms) Equalization Phase 2 time(ms) Equalization Phase 3 time(ms) PHY LTSSM Histogram 0 PHY LTSSM Histogram 1 PHY LTSSM Histogram 2 PHY LTSSM Histogram 3 Recovery Histogram 0 Recovery Histogram 1 Module temperature low alarm Module voltage high alarm Module voltage low alarm Module voltage high warning Module voltage low warning Laser bias current low alarm Laser output power high alarm Laser output power low alarm Laser rx power high alarm Laser rx power low alarm Laser rx power high warning Laser rx power low warning TX_IPFIL_TBL TX_SRC_MAC_TBL RX_DESC_PTR_TBL_KER RX_DESC_PTR_TBL TX_DESC_PTR_TBL_KER TX_DESC_PTR_TBL EVQ_PTR_TBL_KER EVQ_PTR_TBL BUF_FULL_TBL_KER BUF_FULL_TBL RX_MAC_FILTER_TBL0 TIMER_TBL TX_PACE_TBL RX_INDIRECTION_TBL TX_MAC_FILTER_TBL0 MC_TREG_SMEM RX_FILTER_TBL0 BIU_MC_SFT_STATUS HW_INIT USR_EV_CFG EE_SPI_HCMD EE_SPI_HADR EE_SPI_HDATA EE_BASE_PAGE EE_VPD_CFG0 NIC_STAT GPIO_CTL GLB_CTL DP_CTRL MEM_STAT CS_DEBUG ALTERA_BUILD CSR_SPARE PCIE_SD_CTL0123 PCIE_SD_CTL45 PCIE_PCS_CTL_STAT EVQ_CTL EVQ_CNT1 EVQ_CNT2 BUF_TBL_CFG SRM_RX_DC_CFG SRM_TX_DC_CFG SRM_CFG SRM_UPD_EVQ SRAM_PARITY RX_FILTER_CTL RX_DC_PF_WM RX_RSS_TKEY RX_SELF_RST RX_RSS_IPV6_REG1 RX_RSS_IPV6_REG2 RX_RSS_IPV6_REG3 TX_CHKSM_CFG TX_RESERVED TX_VLAN TX_IPFIL_PORTEN MD_CS MD_ID MAC_STAT_DMA MAC_CTRL GEN_MODE MAC_MC_HASH_REG0 MAC_MC_HASH_REG1 GM_CFG1 GM_CFG2 GM_ADR1 GM_ADR2 GMF_CFG0 GMF_CFG1 GMF_CFG2 GMF_CFG3 GMF_CFG4 GMF_CFG5 TX_SRC_MAC_CTL XM_GLB_CFG XM_TX_CFG XM_RX_CFG XM_MGT_INT_MASK XM_FC XM_TX_PARAM XM_RX_PARAM XX_PWR_RST XX_SD_CTL XX_TXDRV_CTL BIU_HW_REV_ID MC_DB_LWRD MC_DB_HWRD bit%u PLCA status: No data available ethtool (%s): Permanent address: not set Permanent address of %s: Pre-set maximums: rx-max RX: %s%u %sn/a tx-max TX: other-max Other: combined-max Combined: Current hardware settings: true false n/a ifname Adaptive RX: %s stats-block-usecs: sample-interval: pkt-rate-low: pkt-rate-high: rx-usecs: rx-frames: rx-usecs-irq: rx-frames-irq: tx-usecs: tx-frames: tx-usecs-irq: tx-frames-irq: rx-usecs-low: rx-frame-low rx-frame-low: tx-usecs-low: tx-frame-low tx-frame-low: rx-usecs-high: rx-frame-high rx-frame-high: tx-usecs-high: tx-frame-high tx-frame-high: CQE mode RX: %s tx-aggr-max-bytes tx-aggr-max-bytes: tx-aggr-max-frames tx-aggr-max-frames: tx-aggr-time-usecs tx-aggr-time-usecs fixed null requested %s [requested %s] %s [not requested] Pre-set maximums: RX: rx-mini-max RX Mini: rx-jumbo-max RX Jumbo: TX: Current hardware settings: tx-push-buff-max-len TX push buff len: rx-buf-len RX Buf Len: cqe-size CQE Size: tx-push TX Push: %s rx-push RX Push: %s tx-push-buf-len TCP data split: %s tcp-data-split unknown(%d) negotiated RX negotiated: %s TX negotiated: %s autonegotiate Autonegotiate: %s RX: %s TX: %s Statistics: %s: %%lu inactive EEE settings for %s: enabled - %s Tx LPI: %u (us) Supported EEE link modes: Advertised EEE link modes: Capabilities none Hardware Receive Filter Modes BIT%u %s: %lu total lanes Lane %d: %lu Standard stats for %s: %s-%s: rx-pktsNtoM tx-pktsNtoM -s -L -C -a -A ===> %s%*s[%u] %s%*s%s 0x%08x %lx %ld "%.*s" %*s aggregate pmac preferred-master preferred-slave forced-master forced-slave tp da corrected_blocks uncorrectable_blocks corrected_bits --src cqe-mode-rx cqe-mode-tx -S INITIAL VERIFYING SUCCEEDED FAILED DISABLED UNKNOWN pmac-enabled pMAC enabled: %s tx-enabled TX enabled: %s tx-active TX active: %s tx-min-frag-size TX minimum fragment size: rx-min-frag-size RX minimum fragment size: verify-enabled Verify enabled: %s Verify time: max-verify-time Max verify time: Verification status: %s verify-status Failed to print stats: %d Module parameters for %s: power-mode-policy: %s power-mode-policy power-mode: %s power-mode unsupported searching delivering power sleep idle PSE attributes for %s: PoDL PSE Admin State: %s podl-pse-admin-state bit%u coordinator unconfigured follower PLCA settings for %s: Enabled: local node ID: %u (%s) Node count: (ignored) TO timer: %u BT Burst count: Burst timer: PLCA status of %s: Status: Pair B Pair A Pair C Pair D Unexpected pair Open Circuit Short within Pair Short to another pair code %s %s, %g fault length: %0.2fm Cannot start cable test amplitude Amplitude %4d pulse TDR Pulse %dmV first Step configuration: %.2f- last %.2f meters step in %.2fm steps Tunnel information for %s: UDP port table %d: Size: %d Types: No entries Entries (%d): port %d, %s Cannot start cable test TDR (GBIC) (SFP) (300 pin XBI) (XENPAK) (XFP) (XFF) (XFP-E) (XPAK) (X2) (DWDM-SFP) (QSFP) (QSFP+) (CXP) (QSFP28) (CXP2/CXP28) (CDFP Style 1/Style 2) (CDFP Style 3) (microQSFP) %s%c Invalid boolean %s-%s-etherStatsPkts %uto%uOctets: %llu %utoMaxOctets: %llu %s [%u] -m -x %5u: %5u rss-indirection-table rss-hash-key rss-hash-function podl-pse-admin-control node-id node-cnt to-tmr burst-cnt burst-tmr page bank i2c MACMergeFrameAssErrorCount MACMergeFrameSmdErrorCount MACMergeFrameAssOkCount MACMergeFragCountRx MACMergeFragCountTx MACMergeHoldCount --groups --all-groups stats-block-usecs: %u sample-interval: %u pkt-rate-low: %u pkt-rate-high: %u rx-usecs: %u rx-frames: %u rx-usecs-irq: %u rx-frames-irq: %u tx-usecs: %u tx-frames: %u tx-usecs-irq: %u tx-frames-irq: %u rx-usecs-low: %u rx-frames-low: %u tx-usecs-low: %u tx-frames-low: %u rx-usecs-high: %u rx-frames-high: %u tx-usecs-high: %u tx-frames-high: %u Cannot get device %s settings: %m Cannot get device generic features Cannot allocate memory for operation Cannot get device per queue parameters Cannot get device pause settings no pause parameters changed, aborting Cannot set device pause parameters Cannot get device ring settings no ring parameters changed, aborting Cannot set device ring parameters Cannot get device channel parameters no channel parameters changed. current values: rx %u tx %u other %u combined %u Cannot set device channel parameters Cannot get device coalesce settings no coalesce parameters changed, aborting Cannot set device coalesce parameters Cannot get device feature names Cannot set device feature settings Cannot set device %s settings: %m Cannot set device flag settings Could not change any device features Only setting first 32 private flags At least one weight must be non-zero Total weight exceeds the size of the indirection table offset & length out of bounds Cannot allocate memory for EEPROM data ethtool --monitor Show kernel notifications [ DEVNAME | * ] --debug MASK turn on debugging messages --json enable JSON output format (not supported by all commands) -I|--include-statistics request device statistics related to the command (not supported by all commands) Src IP addr: %s mask: %s Dest IP addr: %s mask: %s TOS: 0x%x mask: 0x%x Src IP addr: %s mask: %s Dest IP addr: %s mask: %s Traffic Class: 0x%x mask: 0x%x Src port: %d mask: 0x%x Dest port: %d mask: 0x%x Rule Type: IPSEC AH over IPv4 Rule Type: IPSEC ESP over IPv4 Protocol: %d mask: 0x%x L4 bytes: 0x%x mask: 0x%x Rule Type: IPSEC AH over IPv6 Rule Type: IPSEC ESP over IPv6 Flow Type: Raw Ethernet Src MAC addr: %02X:%02X:%02X:%02X:%02X:%02X mask: %02X:%02X:%02X:%02X:%02X:%02X Dest MAC addr: %02X:%02X:%02X:%02X:%02X:%02X mask: %02X:%02X:%02X:%02X:%02X:%02X Ethertype: 0x%X mask: 0x%X VLAN EtherType: 0x%x mask: 0x%x VLAN: 0x%x mask: 0x%x User-defined: 0x%llx mask: 0x%llx Dest MAC addr: %02X:%02X:%02X:%02X:%02X:%02X mask: %02X:%02X:%02X:%02X:%02X:%02X Action: Direct to VF %llu queue %llu Action: Direct to queue %llu rxclass: Cannot get RX class rule IPV4_USER_FLOW with wrong ip_ver ethtool: bad command line argument(s) For more information run ethtool -h driver: %.*s version: %.*s firmware-version: %.*s expansion-rom-version: %.*s bus-info: %.*s supports-statistics: %s supports-test: %s supports-eeprom-access: %s supports-register-dump: %s supports-priv-flags: %s Pre-set maximums: RX: %u RX Mini: %u RX Jumbo: %u TX: %u Current hardware settings: RX: %u RX Mini: %u RX Jumbo: %u TX: %u Pre-set maximums: RX: %u TX: %u Other: %u Combined: %u Current hardware settings: RX: %u TX: %u Other: %u Combined: %u Cannot restart autonegotiation Cannot allocate memory for test info External loopback test was %sexecuted Cannot get stats strings information Cannot change RX network flow hashing options Add rule, unrecognized option[%s] action and queue are not compatible action and vf are not compatible Cannot add new rule via N-tuple rxclass: Cannot get RX class rule count rmgr: Cannot allocate memory for RX class rule locations rmgr: Cannot get RX class rules rmgr: Invalid RX class rules table size rmgr: Cannot allocate memory for RX class rules rmgr: Cannot find appropriate slot to insert rule rmgr: Cannot insert RX class rule Cannot insert classification rule rmgr: Cannot delete RX class rule Cannot delete classification rule Cannot get RX network flow hashing options - All matching flows discarded on RX use these fields for computing Hash flow key: L4 bytes 0 & 1 [TCP/UDP src port] L4 bytes 2 & 3 [TCP/UDP dst port] Cannot get RX classification rule rxclass: Cannot allocate memory for RX class rule locations rxclass: Cannot get RX class rules RX classification rule retrieval failed flag: %u, version: %u, length: %u Can not allocate enough memory Can not write all of dump data Only showing first 32 private flags Time stamping parameters for %s: Cannot get device time stamping settings Hardware Transmit Timestamp Modes: Hardware Receive Filter Modes: Cannot Get PHY downshift count Cannot Get PHY Fast Link Down value Fast Link Down enabled, %d msecs Cannot Get PHY Energy Detect Power Down value Energy Detect Power Down: disabled Energy Detect Power Down: enabled, TX disabled Energy Detect Power Down: enabled, TX %u msecs 'count' may not be set when downshift is off. Cannot Set PHY downshift count Cannot Set PHY Fast Link Down value Cannot Set PHY Energy Detect Power Down Supported/Configured FEC encodings: The sub commands will be applied to all %d queues Queue %d, no coalesce parameters changed Cannot set device per queue parameters The subcommand is not supported yet Equal and weight options are mutually exclusive Equal and default options are mutually exclusive Weight and default options are mutually exclusive Start and default options are mutually exclusive Start must be used with equal or weight options Default and context options are mutually exclusive Delete option requires context option Delete and weight options are mutually exclusive Delete and equal options are mutually exclusive Delete and default options are mutually exclusive Delete and hkey options are mutually exclusive Cannot get RX flow hash indirection table size Cannot allocate memory for indirection table Cannot set RX flow hash indirection table Cannot get RX flow hash indir size and key size Cannot set RX flow hash configuration: Hash key setting not supported Cannot allocate memory for RSS hash key Key is too long for device (%u > %u) Key is too short for device (%u < %u) Cannot get hash functions names Cannot allocate memory for RX flow hash config Cannot set RX flow hash configuration ethtool: parameter '%s' can be used only with netlink Cannot get current device settings Driver supports one or more unknown flags Cannot get current wake-on-lan settings Cannot set new wake-on-lan settings Cannot allocate memory for register dump Magic number 0x%08x does not match 0x%08x Hex and raw dump cannot be specified together Cannot get module EEPROM information Cannot allocate memory for Module EEPROM data ethtool netlink support for subcommand missing netlink interface initialization failed kernel netlink support for subcommand missing subcommand does not support wildcard dump Netlink interface initialization failed, option --monitor not supported. multicast group 'monitor' not found monitoring for option '%s' not supported device name '%s' longer than %u characters %s, subcommand not supported by ioctl %s, wildcard dump not supported %s, device name longer than %u not supported Device name longer than %u characters Cannot get wake-on-lan settings Current message level: 0x%08x (%d) Cannot get RX flow hash indirection table Cannot get RX flow hash indir size and/or key size Cannot get RX flow hash configuration -k|--show-features|--show-offload|-K|--features|--offload --show-priv-flags|--set-priv-flags -l|--show-channels|-L|--set-channels -c|--show-coalesce|-C|--coalesce Display standard information about device [ speed %d ] [ lanes %d ] [ duplex half|full ] [ port tp|aui|bnc|mii|fibre|da ] [ mdix auto|on|off ] [ autoneg on|off ] [ advertise %x[/%x] | mode on|off ... [--] ] [ phyad %d ] [ xcvr internal|external ] [ wol %d[/%d] | p|u|m|b|a|g|s|f|d... ] [ sopass %x:%x:%x:%x:%x:%x ] [ msglvl %d[/%d] | type on|off ... [--] ] [ master-slave preferred-master|preferred-slave|forced-master|forced-slave ] [ --src aggregate | emac | pmac ] [ autoneg on|off ] [ rx on|off ] [ tx on|off ] [adaptive-rx on|off] [adaptive-tx on|off] [rx-usecs N] [rx-frames N] [rx-usecs-irq N] [rx-frames-irq N] [tx-usecs N] [tx-frames N] [tx-usecs-irq N] [tx-frames-irq N] [stats-block-usecs N] [pkt-rate-low N] [rx-usecs-low N] [rx-frames-low N] [tx-usecs-low N] [tx-frames-low N] [pkt-rate-high N] [rx-usecs-high N] [rx-frames-high N] [tx-usecs-high N] [tx-frames-high N] [sample-interval N] [cqe-mode-rx on|off] [cqe-mode-tx on|off] [tx-aggr-max-bytes N] [tx-aggr-max-frames N] [tx-aggr-time-usecs N] [ rx N ] [ rx-mini N ] [ rx-jumbo N ] [ tx N ] [ rx-buf-len N ] [ tcp-data-split auto|on|off ] [ cqe-size N ] [ tx-push on|off ] [ rx-push on|off ] [ tx-push-buf-len N] -k|--show-features|--show-offload Get state of protocol offload and other features Set protocol offload and other features [ raw on|off ] [ file FILENAME ] [ raw on|off ] [ offset N ] [ length N ] [ magic N ] [ offset N ] [ length N ] [ value N ] Show visible port identification (e.g. blinking) [ online | offline | external_lb ] [ --all-groups | --groups [eth-phy] [eth-mac] [eth-ctrl] [rmon] ] [ --src aggregate | emac | pmac ] -n|-u|--show-nfc|--show-ntuple Show Rx network flow classification options or rules [ rx-flow-hash tcp4|udp4|ah4|esp4|sctp4|tcp6|udp6|ah6|esp6|sctp6 [context %d] | rule %d ] -N|-U|--config-nfc|--config-ntuple Configure Rx network flow classification options or rules rx-flow-hash tcp4|udp4|ah4|esp4|sctp4|tcp6|udp6|ah6|esp6|sctp6 m|v|t|s|d|f|n|r... [context %d] | flow-type ether|ip4|tcp4|udp4|sctp4|ah4|esp4|ip6|tcp6|udp6|ah6|esp6|sctp6 [ src %x:%x:%x:%x:%x:%x [m %x:%x:%x:%x:%x:%x] ] [ dst %x:%x:%x:%x:%x:%x [m %x:%x:%x:%x:%x:%x] ] [ proto %d [m %x] ] [ src-ip IP-ADDRESS [m IP-ADDRESS] ] [ dst-ip IP-ADDRESS [m IP-ADDRESS] ] [ tos %d [m %x] ] [ tclass %d [m %x] ] [ l4proto %d [m %x] ] [ src-port %d [m %x] ] [ dst-port %d [m %x] ] [ spi %d [m %x] ] [ vlan-etype %x [m %x] ] [ vlan %x [m %x] ] [ user-def %x [m %x] ] [ dst-mac %x:%x:%x:%x:%x:%x [m %x:%x:%x:%x:%x:%x] ] [ action %d ] | [ vf %d queue %d ] [ context %d ] [ loc %d ] | delete %d Show time stamping capabilities -x|--show-rxfh-indir|--show-rxfh Show Rx flow hash indirection table and/or RSS hash key Set Rx flow hash indirection table and/or RSS hash key [ context %d|new ] [ equal N | weight W0 W1 ... | default ] [ hkey %x:%x:%x:%x:%x:.... ] [ hfunc FUNC ] [ delete ] Flash firmware image from the specified file to a region on the device FILENAME [ REGION-NUMBER-TO-FLASH ] Show permanent hardware address [ rx N ] [ tx N ] [ other N ] [ combined N ] -m|--dump-module-eeprom|--module-info Query/Decode Module EEPROM information and optical diagnostics if available [ raw on|off ] [ hex on|off ] [ offset N ] [ length N ] [ page N ] [ bank N ] [ i2c N ] [ eee on|off ] [ advertise %x ] [ tx-lpi on|off ] [ tx-timer %d ] [ downshift on|off [count N] ] [ fast-link-down on|off [msecs N] ] [ energy-detect-power-down on|off [msecs N] ] [ downshift ] [ fast-link-down ] [ energy-detect-power-down ] [ rx-copybreak ] [ tx-copybreak ] [ tx-buf-size ] [ pfc-prevention-tout ] [ rx-copybreak N ] [ tx-copybreak N ] [ tx-buf-size N ] [ pfc-prevention-tout N ] [ flags %x ] [ mgmt ] [ mgmt-shared ] [ irq ] [ irq-shared ] [ dma ] [ dma-shared ] [ filter ] [ filter-shared ] [ offload ] [ offload-shared ] [ mac ] [ mac-shared ] [ phy ] [ phy-shared ] [ ram ] [ ram-shared ] [ ap ] [ ap-shared ] [ dedicated ] [ all ] [ encoding auto|off|rs|baser|llrs [...] ] The supported sub commands include --show-coalesce, --coalesce [queue_mask %x] SUB_COMMAND Print cable test time domain reflectrometery data [ first N ] [ last N ] [ step N ] [ pair N ] Show NIC tunnel offload information Show transceiver module settings Set transceiver module settings [ power-mode-policy high|auto ] [ enable on|off ] [ node-id N ] [ node-cnt N ] [ to-tmr N ] [ burst-cnt N ] [ burst-tmr N ] Set MAC merge layer parameters [ verify-enabled on|off ] [ verify-time N ] [ tx-enabled on|off ] [ pmac-enabled on|off ] [ tx-min-frag-size 60-252 ] Show settings for Power Sourcing Equipment Set Power Sourcing Equipment settings [ podl-pse-admin-control enable|disable ] none (HWTSTAMP_FILTER_NONE) all (HWTSTAMP_FILTER_ALL) some (HWTSTAMP_FILTER_SOME) ptpv1-l4-event (HWTSTAMP_FILTER_PTP_V1_L4_EVENT) ptpv1-l4-sync (HWTSTAMP_FILTER_PTP_V1_L4_SYNC) ptpv1-l4-delay-req (HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ) ptpv2-l4-event (HWTSTAMP_FILTER_PTP_V2_L4_EVENT) ptpv2-l4-sync (HWTSTAMP_FILTER_PTP_V2_L4_SYNC) ptpv2-l4-delay-req (HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ) ptpv2-l2-event (HWTSTAMP_FILTER_PTP_V2_L2_EVENT) ptpv2-l2-sync (HWTSTAMP_FILTER_PTP_V2_L2_SYNC) ptpv2-l2-delay-req (HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ) ptpv2-event (HWTSTAMP_FILTER_PTP_V2_EVENT) ptpv2-sync (HWTSTAMP_FILTER_PTP_V2_SYNC) ptpv2-delay-req (HWTSTAMP_FILTER_PTP_V2_DELAY_REQ) ntp-all (HWTSTAMP_FILTER_NTP_ALL) off (HWTSTAMP_TX_OFF) on (HWTSTAMP_TX_ON) one-step-sync (HWTSTAMP_TX_ONESTEP_SYNC) hardware-transmit (SOF_TIMESTAMPING_TX_HARDWARE) software-transmit (SOF_TIMESTAMPING_TX_SOFTWARE) hardware-receive (SOF_TIMESTAMPING_RX_HARDWARE) software-receive (SOF_TIMESTAMPING_RX_SOFTWARE) software-system-clock (SOF_TIMESTAMPING_SOFTWARE) hardware-legacy-clock (SOF_TIMESTAMPING_SYS_HARDWARE) hardware-raw-clock (SOF_TIMESTAMPING_RAW_HARDWARE) Source Address Filtering controls %-36.36s %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s InFiltered/TcamCtr Frame Counter Link Partner Next Page Ability ------------------------------ %s Switch Port SERDES Registers ------------------------------------- RCR (Receive Control Register) BC_REJ (Broadcast frame reject) DRT (Disable receive on transmit) TCR (Transmit Control Register) RFC_PAUSE (Receive frame control pause) TFC_PAUSE (Transmit frame control pause) IAUR (Individual Address Upper Register) IALR (Individual Address Lower Register) GAUR (Group Address Upper Register) GALR (Group Address Lower Register) TFWR (Transmit FIFO Watermark Register) FRBR (FIFO Receive Bound Register) R_BOUND (Highest valid FIFO RAM address) EMRBR (Maximum Receive Buffer Size) R_BUF_SIZE (Receive buffer size) 0x00100: Transmit descriptor base address register %08X 0x00140: Transmit descriptor length register 0x%08X 0x00120: Receive descriptor base address register %08X 0x00150: Receive descriptor length register 0x%08X 0x00048: Command 0 register 0x%08X Interrupts: %s Device: %s 0x00050: Command 2 register 0x%08X Promiscuous mode: %s Retransmit on underflow: %s 0x00054: Command 3 register 0x%08X Jumbo frame: %s Admit only VLAN frame: %s Delete VLAN tag: %s 0x00064: Command 7 register 0x%08X 0x00038: Interrupt register 0x%08X Any interrupt is set: %s Link change interrupt: %s Register 0 auto-poll interrupt: %s Transmit interrupt: %s Software timer interrupt: %s Receive interrupt: %s 0x00040: Interrupt enable register 0x%08X Link change interrupt: %s Register 0 auto-poll interrupt: %s Transmit interrupt: %s Software timer interrupt: %s Receive interrupt: %s Logical Address Filter Register 0x00168: Logical address filter register 0x%08X%08X 0x00030: Link status register 0x%08X Link status: %s Auto negotiation complete %s Duplex %s Speed %s 0x00030: Link status register 0x%08X Link status: %s 0x40: CSR8 (Missed Frames Counter) 0x%08x Start/Stop Backoff Counter Flaky oscillator disable Transmit buffer unavailable Transmit jabber timeout Receive buffer unavailable Receive watchdog timeout Abnormal interrupt summary Normal interrupt summary Network connection error AUI_TP pin autoconfiguration SIA PLL external input enable Encoder input multiplexer Serial interface input multiplexer Collision squelch enable Collision detect enable Receive watchdog disable Receive watchdog release Special capture effect enabled Early receive interrupt Selected port receive activity Non-selected port receive activity Link partner negotiable SIA register reset asserted CSR autoconfiguration enabled 10base-T/AUI autosensing 0x00: CSR0 (Bus Mode) 0x%08x %s %s address space Cache alignment: %s Programmable burst length unlimited Programmable burst length %d longwords %s endian data buffers Descriptor skip length %d longwords %s bus arbitration scheme Software reset asserted 0x18: CSR3 (Rx Ring Base Address) 0x%08x 0x20: CSR4 (Tx Ring Base Address) 0x%08x 0x28: CSR5 (Status) 0x%08x %s Transmit process %s Receive process %s Link %s Normal interrupts: %s%s%s Abnormal intr: %s%s%s%s%s%s%s%s 0x30: CSR6 (Operating Mode) 0x%08x %s%s Transmit threshold %d bytes Transmit DMA %sabled %s Operating mode: %s %s duplex %s%s%s%s%s%s%s Receive DMA %sabled %s filtering mode 0x38: CSR7 (Interrupt Mask) 0x%08x %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x48: CSR9 (Ethernet Address ROM) 0x%08x 0x58: CSR11 (Full Duplex Autoconfig) 0x%08x 0x60: CSR12 (SIA Status) 0x%08x %s%s%s%s%s%s%s AUI_TP pin: %s 0x68: CSR13 (SIA Connectivity) 0x%08x %s%s%s%s External port output multiplexer select: %u%u%u%u %s%s%s%s %s interface selected %s%s%s 0x70: CSR14 (SIA Transmit and Receive) 0x%08x %s%s%s%s%s%s%s %s %s%s%s%s 0x78: CSR15 (SIA General) 0x%08x %s%s%s%s%s%s%s%s%s%s 0x00: CSR0 (Bus Mode) 0x%08x %s endian descriptors %s %s address space Cache alignment: %s Normal interrupts: %s%s%s%s%s Abnormal intr: %s%s%s%s%s%s%s 0x38: CSR7 (Interrupt Mask) 0x%08x %s%s%s%s%s%s%s%s%s%s%s%s%s%s%s%s 0x48: CSR9 (Boot and Ethernet ROMs) 0x%08x Select bits: %s%s%s%s%s%s Data: %d%d%d%d%d%d%d%d 0x50: CSR10 (Boot ROM Address) 0x%08x 0x58: CSR11 (General Purpose Timer) 0x%08x %s Timer value: %u cycles 0x60: CSR12 (SIA Status) 0x%08x Link partner code word 0x%04x %s NWay state: %s %s%s%s%s%s%s%s%s%s%s%s 0x68: CSR13 (SIA Connectivity) 0x%08x SIA Diagnostic Mode 0x%04x %s %s%s 0x70: CSR14 (SIA Transmit and Receive) 0x%08x %s%s%s%s%s%s%s%s%s%s %s %s%s%s%s 0x78: CSR15 (SIA General) 0x%08x %s%s%s%s%s%s%s%s%s%s%s%s %s port selected %s%s%s SCB Status Word (Lower Word) 0x%04X RU Status: Idle RU Status: Suspended RU Status: No Resources RU Status: Ready RU Status: Suspended with no more RBDs RU Status: No Resources due to no more RBDs RU Status: Ready with no RBDs present RU Status: Unknown State CU Status: Idle CU Status: Suspended CU Status: Active CU Status: Unknown State ---- Interrupts Pending ---- Flow Control Pause: %s Early Receive: %s Software Generated Interrupt: %s MDI Done: %s RU Not In Ready State: %s CU Not in Active State: %s RU Received Frame: %s CU Completed Command: %s SCB Command Word (Upper Word) 0x%04X RU Command: No Command RU Command: RU Start RU Command: RU Resume RU Command: RU Abort RU Command: Load RU Base RU Command: Unknown CU Command: No Command CU Command: CU Start CU Command: CU Resume CU Command: Load Dump Counters Address CU Command: Dump Counters CU Command: Load CU Base CU Command: Dump & Reset Counters CU Command: Unknown Software Generated Interrupt: %s ---- Interrupts Masked ---- ALL Interrupts: %s Flow Control Pause: %s Early Receive: %s RU Not In Ready State: %s CU Not in Active State: %s RU Received Frame: %s CU Completed Command: %s MDI/MDI-X Status: 0x00000: CTRL (Device control register) 0x%08X Endian mode (buffers): %s Link reset: %s Set link up: %s Invert Loss-Of-Signal: %s Receive flow control: %s Transmit flow control: %s VLAN mode: %s Auto speed detect: %s Speed select: %s Force speed: %s Force duplex: %s 0x00008: STATUS (Device status register) 0x%08X Duplex: %s Link up: %s TBI mode: %s Link speed: %s Bus type: %s Port number: %s TBI mode: %s Link speed: %s Bus type: %s Bus speed: %s Bus width: %s 0x00100: RCTL (Receive control register) 0x%08X Receiver: %s Store bad packets: %s Unicast promiscuous: %s Multicast promiscuous: %s Long packet: %s Descriptor minimum threshold size: %s Broadcast accept mode: %s VLAN filter: %s Canonical form indicator: %s Discard pause frames: %s Pass MAC control frames: %s Receive buffer size: %s 0x02808: RDLEN (Receive desc length) 0x%08X 0x02810: RDH (Receive desc head) 0x%08X 0x02818: RDT (Receive desc tail) 0x%08X 0x02820: RDTR (Receive delay timer) 0x%08X 0x00400: TCTL (Transmit ctrl register) 0x%08X Transmitter: %s Pad short packets: %s Software XOFF Transmission: %s Re-transmit on late collision: %s 0x03808: TDLEN (Transmit desc length) 0x%08X 0x03810: TDH (Transmit desc head) 0x%08X 0x03818: TDT (Transmit desc tail) 0x%08X 0x03820: TIDV (Transmit delay timer) 0x%08X PHY type: %s M88 PHY STATUS REGISTER: 0x%08X Jabber: %s Polarity: %s Downshifted: %s MDI/MDIX: %s Cable Length Estimate: %s meters Link State: %s Speed & Duplex Resolved: %s Page Received: %s Duplex: %s Speed: %s mbps M88 PHY CONTROL REGISTER: 0x%08X Jabber function: %s Auto-polarity: %s SQE Test: %s CLK125: %s Auto-MDIX: %s Extended 10Base-T Distance: %s 100Base-TX Interface: %s Scrambler: %s Force Link Good: %s Assert CRS on Transmit: %s 0x0, Basic Control Reg = 0x%04X 0x1, Basic Status Reg = 0x%04X 0x2, PHY identifier 1 = 0x%04X 0x3, PHY identifier 2 = 0x%04X 0x4, Auto Neg Advertisement = 0x%04X 0x5, Auto Neg L Partner Ability = 0x%04X 0x6, Auto Neg Expansion = 0x%04X 0x7, Reserved = 0x%04X 0x8, Reserved = 0x%04X 0x9, 1000T Control = 0x%04X 0xA, 1000T Status = 0x%04X 0xB, Reserved = 0x%04X 0xC, Reserved = 0x%04X 0xD, MMD Access Control = 0x%04X 0xE, MMD access Data = 0x%04X 0xF, Extended Status = 0x%04X 0x10, Phy Index = 0x%04X 0x11, Phy Data = 0x%04X 0x12, MPhy Control = 0x%04X 0x13, Phy Loopback Control1 = 0x%04X 0x14, Phy Loopback Control2 = 0x%04X 0x15, Register Management = 0x%04X 0x16, Phy Config = 0x%04X 0x17, Phy Phy Control = 0x%04X 0x18, Phy Interrupt Mask = 0x%04X 0x19, Phy Interrupt Status = 0x%04X 0x1A, Phy Phy Status = 0x%04X 0x1B, Phy LED1 = 0x%04X 0x1C, Phy LED2 = 0x%04X 0x0, TXQ Start Address = 0x%04X 0x1, TXQ End Address = 0x%04X 0x2, RXQ Start Address = 0x%04X 0x3, RXQ End Address = 0x%04X 0x4, Power Management Status = 0x%04X 0x5, Interrupt Status = 0x%04X 0x6, Interrupt Mask = 0x%04X 0x7, Int Alias Clear Mask = 0x%04X 0x8, Int Status Alias = 0x%04X 0x9, Software Reset = 0x%04X 0xA, SLV Timer = 0x%04X 0xB, MSI Config = 0x%04X 0xC, Loopback = 0x%04X 0xD, Watchdog Timer = 0x%04X 0x0, Control Status = 0x%04X 0x1, Packet Ring Base Addr (Hi) = 0x%04X 0x2, Packet Ring Base Addr (Lo) = 0x%04X 0x3, Packet Ring Num Descrs = 0x%04X 0x4, TX Queue Write Address = 0x%04X 0x5, TX Queue Write Address Ext = 0x%04X 0x6, TX Queue Read Address = 0x%04X 0x7, Status Writeback Addr (Hi) = 0x%04X 0x8, Status Writeback Addr (Lo) = 0x%04X 0x9, Service Request = 0x%04X 0xA, Service Complete = 0x%04X 0xB, Cache Read Index = 0x%04X 0xC, Cache Write Index = 0x%04X 0xD, TXDMA Error = 0x%04X 0xE, Descriptor Abort Count = 0x%04X 0xF, Payload Abort Count = 0x%04X 0x10, Writeback Abort Count = 0x%04X 0x11, Descriptor Timeout Count = 0x%04X 0x12, Payload Timeout Count = 0x%04X 0x13, Writeback Timeout Count = 0x%04X 0x14, Descriptor Error Count = 0x%04X 0x15, Payload Error Count = 0x%04X 0x16, Writeback Error Count = 0x%04X 0x17, Dropped TLP Count = 0x%04X 0x18, New service Complete = 0x%04X 0x1A, Ethernet Packet Count = 0x%04X 0x1, Writeback Addr (Hi) = 0x%04X 0x2, Writeback Addr (Lo) = 0x%04X 0x3, Num Packets Done = 0x%04X 0x4, Max Packet Time = 0x%04X 0x5, RX Queue Read Addr = 0x%04X 0x6, RX Queue Read Address Ext = 0x%04X 0x7, RX Queue Write Addr = 0x%04X 0x8, Packet Ring Base Addr (Hi) = 0x%04X 0x9, Packet Ring Base Addr (Lo) = 0x%04X 0xA, Packet Ring Num Descrs = 0x%04X 0xE, Packet Ring Avail Offset = 0x%04X 0xF, Packet Ring Full Offset = 0x%04X 0x10, Packet Ring Access Index = 0x%04X 0x11, Packet Ring Min Descrip = 0x%04X 0x12, FBR0 Address (Lo) = 0x%04X 0x13, FBR0 Address (Hi) = 0x%04X 0x14, FBR0 Num Descriptors = 0x%04X 0x15, FBR0 Available Offset = 0x%04X 0x16, FBR0 Full Offset = 0x%04X 0x17, FBR0 Read Index = 0x%04X 0x18, FBR0 Minimum Descriptors = 0x%04X 0x19, FBR1 Address (Lo) = 0x%04X 0x1A, FBR1 Address (Hi) = 0x%04X 0x1B, FBR1 Num Descriptors = 0x%04X 0x1C, FBR1 Available Offset = 0x%04X 0x1D, FBR1 Full Offset = 0x%04X 0x1E, FBR1 Read Index = 0x%04X 0x1F, FBR1 Minimum Descriptors = 0x%04X 0x00000: CTRL (Device control register) 0x%08X Invert Loss-Of-Signal: %s Receive flow control: %s Transmit flow control: %s VLAN mode: %s Set link up: %s D3COLD WakeUp capability advertisement: %s Auto speed detect: %s Speed select: %s Force speed: %s Force duplex: %s 0x00008: STATUS (Device status register) 0x%08X Duplex: %s Link up: %s Transmission: %s DMA clock gating: %s TBI mode: %s Link speed: %s Bus type: %s 0x00100: RCTL (Receive control register) 0x%08X Receiver: %s Store bad packets: %s Unicast promiscuous: %s Multicast promiscuous: %s Long packet: %s Descriptor minimum threshold size: %s Broadcast accept mode: %s VLAN filter: %s Cononical form indicator: %s Discard pause frames: %s Pass MAC control frames: %s Loopback mode: %s Receive buffer size: %s 0x02808: RDLEN (Receive desc length) 0x%08X 0x02810: RDH (Receive desc head) 0x%08X 0x02818: RDT (Receive desc tail) 0x%08X 0x00400: TCTL (Transmit ctrl register) 0x%08X Transmitter: %s Pad short packets: %s Software XOFF Transmission: %s Re-transmit on late collision: %s 0x03808: TDLEN (Transmit desc length) 0x%08X 0x03810: TDH (Transmit desc head) 0x%08X 0x03818: TDT (Transmit desc tail) 0x%08X 0x00018: CTRL_EXT (Extended device control) 0x%08X 0x00018: MDIC (MDI control) 0x%08X 0x00024: SCTL (SERDES ANA) 0x%08X 0x00034: CONNSW (Copper/Fiber switch control) 0x%08X 0x00038: VET (VLAN Ether type) 0x%08X 0x00E00: LEDCTL (LED control) 0x%08X 0x01000: PBA (Packet buffer allocation) 0x%08X 0x01008: PBS (Packet buffer size) 0x%08X 0x01048: FRTIMER (Free running timer) 0x%08X 0x0104C: TCPTIMER (TCP timer) 0x%08X 0x00010: EEC (EEPROM/FLASH control) 0x%08X 0x01580: EICR (Extended interrupt cause) 0x%08X 0x01520: EICS (Extended interrupt cause set) 0x%08X 0x01524: EIMS (Extended interrup set/read) 0x%08X 0x01528: EIMC (Extended interrupt mask clear) 0x%08X 0x0152C: EIAC (Extended interrupt auto clear) 0x%08X 0x01530: EIAM (Extended interrupt auto mask) 0x%08X 0x01500: ICR (Interrupt cause read) 0x%08X 0x01504: ICS (Interrupt cause set) 0x%08X 0x01508: IMS (Interrupt mask set/read) 0x%08X 0x0150C: IMC (Interrupt mask clear) 0x%08X 0x04100: IAC (Interrupt assertion count) 0x%08X 0x01510: IAM (Interr acknowledge auto-mask) 0x%08X 0x05AC0: IMIRVP (Immed interr rx VLAN priority) 0x%08X 0x00028: FCAL (Flow control address low) 0x%08X 0x0002C: FCAH (Flow control address high) 0x%08X 0x00170: FCTTV (Flow control tx timer value) 0x%08X 0x02160: FCRTL (Flow control rx threshold low) 0x%08X 0x02168: FCRTH (Flow control rx threshold high) 0x%08X 0x02460: FCRTV (Flow control refresh threshold) 0x%08X 0x05000: RXCSUM (Receive checksum control) 0x%08X 0x05004: RLPML (Receive long packet max length) 0x%08X 0x05008: RFCTL (Receive filter control) 0x%08X 0x05818: MRQC (Multiple rx queues command) 0x%08X 0x0581C: VMD_CTL (VMDq control) 0x%08X 0x00404: TCTL_EXT (Transmit control extended) 0x%08X 0x00410: TIPG (Transmit IPG) 0x%08X 0x03590: DTXCTL (DMA tx control) 0x%08X 0x05800: WUC (Wake up control) 0x%08X 0x05808: WUFC (Wake up filter control) 0x%08X 0x05810: WUS (Wake up status) 0x%08X 0x05838: IPAV (IP address valid) 0x%08X 0x05900: WUPL (Wake up packet length) 0x%08X 0x04200: PCS_CFG (PCS configuration 0) 0x%08X 0x04208: PCS_LCTL (PCS link control) 0x%08X 0x0420C: PCS_LSTS (PCS link status) 0x%08X 0x04218: PCS_ANADV (AN advertisement) 0x%08X 0x0421C: PCS_LPAB (Link partner ability) 0x%08X 0x04220: PCS_NPTX (Next Page transmit) 0x%08X 0x04224: PCS_LPABNP (Link partner ability Next Page) 0x%08X 0x04000: CRCERRS (CRC error count) 0x%08X 0x04004: ALGNERRC (Alignment error count) 0x%08X 0x04008: SYMERRS (Symbol error count) 0x%08X 0x0400C: RXERRC (RX error count) 0x%08X 0x04010: MPC (Missed packets count) 0x%08X 0x04014: SCC (Single collision count) 0x%08X 0x04018: ECOL (Excessive collisions count) 0x%08X 0x0401C: MCC (Multiple collision count) 0x%08X 0x04020: LATECOL (Late collisions count) 0x%08X 0x04028: COLC (Collision count) 0x%08X 0x04030: DC (Defer count) 0x%08X 0x04034: TNCRS (Transmit with no CRS) 0x%08X 0x04038: SEC (Sequence error count) 0x%08X 0x0403C: HTDPMC (Host tx discrd pkts MAC count) 0x%08X 0x04040: RLEC (Receive length error count) 0x%08X 0x04048: XONRXC (XON received count) 0x%08X 0x0404C: XONTXC (XON transmitted count) 0x%08X 0x04050: XOFFRXC (XOFF received count) 0x%08X 0x04054: XOFFTXC (XOFF transmitted count) 0x%08X 0x04058: FCRUC (FC received unsupported count) 0x%08X 0x0405C: PRC64 (Packets rx (64 B) count) 0x%08X 0x04060: PRC127 (Packets rx (65-127 B) count) 0x%08X 0x04064: PRC255 (Packets rx (128-255 B) count) 0x%08X 0x04068: PRC511 (Packets rx (256-511 B) count) 0x%08X 0x0406C: PRC1023 (Packets rx (512-1023 B) count) 0x%08X 0x04070: PRC1522 (Packets rx (1024-max B) count) 0x%08X 0x04074: GPRC (Good packets received count) 0x%08X 0x04078: BPRC (Broadcast packets rx count) 0x%08X 0x0407C: MPRC (Multicast packets rx count) 0x%08X 0x04080: GPTC (Good packets tx count) 0x%08X 0x04088: GORCL (Good octets rx count lower) 0x%08X 0x0408C: GORCH (Good octets rx count upper) 0x%08X 0x04090: GOTCL (Good octets tx count lower) 0x%08X 0x04094: GOTCH (Good octets tx count upper) 0x%08X 0x040A0: RNBC (Receive no buffers count) 0x%08X 0x040A4: RUC (Receive undersize count) 0x%08X 0x040A8: RFC (Receive fragment count) 0x%08X 0x040AC: ROC (Receive oversize count) 0x%08X 0x040B0: RJC (Receive jabber count) 0x%08X 0x040B4: MGPRC (Management packets rx count) 0x%08X 0x040B8: MGPDC (Management pkts dropped count) 0x%08X 0x040BC: MGPTC (Management packets tx count) 0x%08X 0x040C0: TORL (Total octets received lower) 0x%08X 0x040C4: TORH (Total octets received upper) 0x%08X 0x040C8: TOTL (Total octets transmitted lower) 0x%08X 0x040CC: TOTH (Total octets transmitted upper) 0x%08X 0x040D0: TPR (Total packets received) 0x%08X 0x040D4: TPT (Total packets transmitted) 0x%08X 0x040D8: PTC64 (Packets tx (64 B) count) 0x%08X 0x040DC: PTC127 (Packets tx (65-127 B) count) 0x%08X 0x040E0: PTC255 (Packets tx (128-255 B) count) 0x%08X 0x040E4: PTC511 (Packets tx (256-511 B) count) 0x%08X 0x040E8: PTC1023 (Packets tx (512-1023 B) count) 0x%08X 0x040EC: PTC1522 (Packets tx (> 1024 B) count) 0x%08X 0x040F0: MPTC (Multicast packets tx count) 0x%08X 0x040F4: BPTC (Broadcast packets tx count) 0x%08X 0x040F8: TSCTC (TCP segment context tx count) 0x%08X 0x04104: RPTHC (Rx packets to host count) 0x%08X 0x04118: HGPTC (Host good packets tx count) 0x%08X 0x04128: HGORCL (Host good octets rx cnt lower) 0x%08X 0x0412C: HGORCH (Host good octets rx cnt upper) 0x%08X 0x04130: HGOTCL (Host good octets tx cnt lower) 0x%08X 0x04134: HGOTCH (Host good octets tx cnt upper) 0x%08X 0x04138: LENNERS (Length error count) 0x%08X 0x04228: SCVPC (SerDes/SGMII code viol pkt cnt) 0x%08X 0x0A018: HRMPC (Header redir missed pkt count) 0x%08X 0x0%02X: SRRCTL%d (Split and replic rx ctl%d) 0x%08X 0x0%02X: PSRTYPE%d (Packet split receive type%d) 0x%08X 0x0%02X: RDBAL%d (Rx desc base addr low%d) 0x%08X 0x0%02X: RDBAH%d (Rx desc base addr high%d) 0x%08X 0x0%02X: RDLEN%d (Rx descriptor length%d) 0x%08X 0x0%02X: RDH%d (Rx descriptor head%d) 0x%08X 0x0%02X: RDT%d (Rx descriptor tail%d) 0x%08X 0x0%02X: RXDCTL%d (Rx descriptor control%d) 0x%08X 0x0%02X: EITR%d (Interrupt throttle%d) 0x%08X 0x0%02X: IMIR%d (Immediate interrupt Rx%d) 0x%08X 0x0%02X: IMIREXT%d (Immediate interr Rx extended%d) 0x%08X 0x0%02X: RAL%02d (Receive address low%02d) 0x%08X 0x0%02X: RAH%02d (Receive address high%02d) 0x%08X 0x0%02X: TDBAL%d (Tx desc base address low%d) 0x%08X 0x0%02X: TDBAH%d (Tx desc base address high%d) 0x%08X 0x0%02X: TDLEN%d (Tx descriptor length%d) 0x%08X 0x0%02X: TDH%d (Transmit descriptor head%d) 0x%08X 0x0%02X: TDT%d (Transmit descriptor tail%d) 0x%08X 0x0%02X: TXDCTL%d (Transmit descriptor control%d) 0x%08X 0x0%02X: TDWBAL%d (Tx desc complete wb addr low%d) 0x%08X 0x0%02X: TDWBAH%d (Tx desc complete wb addr hi%d) 0x%08X 0x0%02X: DCA_TXCTRL%d (Tx DCA control%d) 0x%08X 0x0%02X: IP4AT%d (IPv4 address table%d) 0x%08X 0x0%02X: IP6AT%d (IPv6 address table%d) 0x%08X 0x0%02X: WUPM%02d (Wake up packet memory%02d) 0x%08X 0x0%02X: FFMT%03d (Flexible filter mask table%03d) 0x%08X 0x0%02X: FFVT%03d (Flexible filter value table%03d) 0x%08X 0x0%02X: FFLT%d (Flexible filter length table%d) 0x%08X 0x03410: TDFH (Tx data FIFO head) 0x%08X 0x03418: TDFT (Tx data FIFO tail) 0x%08X 0x03420: TDFHS (Tx data FIFO head saved) 0x%08X 0x03430: TDFPC (Tx data FIFO packet count) 0x%08X 0x05BF4: RR2DCDELAY (Max. DMA read delay) 0x%08X Expected length to be multiple of 8 bytes MG %d RXSTP %d REG_LOWP_RXETY %d TX_LOWP_ENA %d SFD %d NO_LEN_CHK %d SEND_IDLE %d CNT_FRM_EN %d SWR %d TXP %d XGLP %d TX_ADDR_INS %d PAUSE_IGN %d PAUSE_FWD %d CRC %d PAD %d PROMIS %d WAN %d RX_EN %d TX_EN %d SI primary MAC address register 0 SI primary MAC address register 1 SI control BDR status register SI control BDR base address register 0 SI control BDR base address register 1 SI control BDR producer index register SI control BDR consumer index register SI control BDR length register SI uncorrectable error frame drop count register TX BDR 0 base address register 0 TX BDR 0 base address register 1 TX BDR 0 producer index register TX BDR 0 consumer index register TX BDR 0 interrupt enable register TX BDR 0 interrupt coalescing register 0 TX BDR 0 interrupt coalescing register 1 TX BDR 1 base address register 0 TX BDR 1 base address register 1 TX BDR 1 producer index register TX BDR 1 consumer index register TX BDR 1 interrupt enable register TX BDR 1 interrupt coalescing register 0 TX BDR 1 interrupt coalescing register 1 TX BDR 2 base address register 0 TX BDR 2 base address register 1 TX BDR 2 producer index register TX BDR 2 consumer index register TX BDR 2 interrupt enable register TX BDR 2 interrupt coalescing register 0 TX BDR 2 interrupt coalescing register 1 TX BDR 3 base address register 0 TX BDR 3 base address register 1 TX BDR 3 producer index register TX BDR 3 consumer index register TX BDR 3 interrupt enable register TX BDR 3 interrupt coalescing register 0 TX BDR 3 interrupt coalescing register 1 TX BDR 4 base address register 0 TX BDR 4 base address register 1 TX BDR 4 producer index register TX BDR 4 consumer index register TX BDR 4 interrupt enable register TX BDR 4 interrupt coalescing register 0 TX BDR 4 interrupt coalescing register 1 TX BDR 5 base address register 0 TX BDR 5 base address register 1 TX BDR 5 producer index register TX BDR 5 consumer index register TX BDR 5 interrupt enable register TX BDR 5 interrupt coalescing register 0 TX BDR 5 interrupt coalescing register 1 TX BDR 6 base address register 0 TX BDR 6 base address register 1 TX BDR 6 producer index register TX BDR 6 consumer index register TX BDR 6 interrupt enable register TX BDR 6 interrupt coalescing register 0 TX BDR 6 interrupt coalescing register 1 TX BDR 7 base address register 0 TX BDR 7 base address register 1 TX BDR 7 producer index register TX BDR 7 consumer index register TX BDR 7 interrupt enable register TX BDR 7 interrupt coalescing register 0 TX BDR 7 interrupt coalescing register 1 TX BDR 8 base address register 0 TX BDR 8 base address register 1 TX BDR 8 producer index register TX BDR 8 consumer index register TX BDR 8 interrupt enable register TX BDR 8 interrupt coalescing register 0 TX BDR 8 interrupt coalescing register 1 TX BDR 9 base address register 0 TX BDR 9 base address register 1 TX BDR 9 producer index register TX BDR 9 consumer index register TX BDR 9 interrupt enable register TX BDR 9 interrupt coalescing register 0 TX BDR 9 interrupt coalescing register 1 TX BDR 10 base address register 0 TX BDR 10 base address register 1 TX BDR 10 producer index register TX BDR 10 consumer index register TX BDR 10 interrupt enable register TX BDR 10 interrupt coalescing register 0 TX BDR 10 interrupt coalescing register 1 TX BDR 11 base address register 0 TX BDR 11 base address register 1 TX BDR 11 producer index register TX BDR 11 consumer index register TX BDR 11 interrupt enable register TX BDR 11 interrupt coalescing register 0 TX BDR 11 interrupt coalescing register 1 TX BDR 12 base address register 0 TX BDR 12 base address register 1 TX BDR 12 producer index register TX BDR 12 consumer index register TX BDR 12 interrupt enable register TX BDR 12 interrupt coalescing register 0 TX BDR 12 interrupt coalescing register 1 TX BDR 13 base address register 0 TX BDR 13 base address register 1 TX BDR 13 producer index register TX BDR 13 consumer index register TX BDR 13 interrupt enable register TX BDR 13 interrupt coalescing register 0 TX BDR 13 interrupt coalescing register 1 TX BDR 14 base address register 0 TX BDR 14 base address register 1 TX BDR 14 producer index register TX BDR 14 consumer index register TX BDR 14 interrupt enable register TX BDR 14 interrupt coalescing register 0 TX BDR 14 interrupt coalescing register 1 TX BDR 15 base address register 0 TX BDR 15 base address register 1 TX BDR 15 producer index register TX BDR 15 consumer index register TX BDR 15 interrupt enable register TX BDR 15 interrupt coalescing register 0 TX BDR 15 interrupt coalescing register 1 RX BDR 0 producer index register RX BDR 0 consumer index register RX BDR 0 base address register 0 RX BDR 0 base address register 1 RX BDR 0 interrupt enable register RX BDR 0 interrupt coalescing register 0 RX BDR 0 interrupt coalescing register 1 RX BDR 1 producer index register RX BDR 1 consumer index register RX BDR 1 base address register 0 RX BDR 1 base address register 1 RX BDR 1 interrupt enable register RX BDR 1 interrupt coalescing register 0 RX BDR 1 interrupt coalescing register 1 RX BDR 2 producer index register RX BDR 2 consumer index register RX BDR 2 base address register 0 RX BDR 2 base address register 1 RX BDR 2 interrupt enable register RX BDR 2 interrupt coalescing register 0 RX BDR 2 interrupt coalescing register 1 RX BDR 3 producer index register RX BDR 3 consumer index register RX BDR 3 base address register 0 RX BDR 3 base address register 1 RX BDR 3 interrupt enable register RX BDR 3 interrupt coalescing register 0 RX BDR 3 interrupt coalescing register 1 RX BDR 4 producer index register RX BDR 4 consumer index register RX BDR 4 base address register 0 RX BDR 4 base address register 1 RX BDR 4 interrupt enable register RX BDR 4 interrupt coalescing register 0 RX BDR 4 interrupt coalescing register 1 RX BDR 5 producer index register RX BDR 5 consumer index register RX BDR 5 base address register 0 RX BDR 5 base address register 1 RX BDR 5 interrupt enable register RX BDR 5 interrupt coalescing register 0 RX BDR 5 interrupt coalescing register 1 RX BDR 6 producer index register RX BDR 6 consumer index register RX BDR 6 base address register 0 RX BDR 6 base address register 1 RX BDR 6 interrupt enable register RX BDR 6 interrupt coalescing register 0 RX BDR 6 interrupt coalescing register 1 RX BDR 7 producer index register RX BDR 7 consumer index register RX BDR 7 base address register 0 RX BDR 7 base address register 1 RX BDR 7 interrupt enable register RX BDR 7 interrupt coalescing register 0 RX BDR 7 interrupt coalescing register 1 RX BDR 8 producer index register RX BDR 8 consumer index register RX BDR 8 base address register 0 RX BDR 8 base address register 1 RX BDR 8 interrupt enable register RX BDR 8 interrupt coalescing register 0 RX BDR 8 interrupt coalescing register 1 RX BDR 9 producer index register RX BDR 9 consumer index register RX BDR 9 base address register 0 RX BDR 9 base address register 1 RX BDR 9 interrupt enable register RX BDR 9 interrupt coalescing register 0 RX BDR 9 interrupt coalescing register 1 RX BDR 10 buffer size register RX BDR 10 producer index register RX BDR 10 consumer index register RX BDR 10 base address register 0 RX BDR 10 base address register 1 RX BDR 10 interrupt enable register RX BDR 10 interrupt coalescing register 0 RX BDR 10 interrupt coalescing register 1 RX BDR 11 buffer size register RX BDR 11 producer index register RX BDR 11 consumer index register RX BDR 11 base address register 0 RX BDR 11 base address register 1 RX BDR 11 interrupt enable register RX BDR 11 interrupt coalescing register 0 RX BDR 11 interrupt coalescing register 1 RX BDR 12 buffer size register RX BDR 12 producer index register RX BDR 12 consumer index register RX BDR 12 base address register 0 RX BDR 12 base address register 1 RX BDR 12 interrupt enable register RX BDR 12 interrupt coalescing register 0 RX BDR 12 interrupt coalescing register 1 RX BDR 13 buffer size register RX BDR 13 producer index register RX BDR 13 consumer index register RX BDR 13 base address register 0 RX BDR 13 base address register 1 RX BDR 13 interrupt enable register RX BDR 13 interrupt coalescing register 0 RX BDR 13 interrupt coalescing register 1 RX BDR 14 buffer size register RX BDR 14 producer index register RX BDR 14 consumer index register RX BDR 14 base address register 0 RX BDR 14 base address register 1 RX BDR 14 interrupt enable register RX BDR 14 interrupt coalescing register 0 RX BDR 14 interrupt coalescing register 1 RX BDR 15 buffer size register RX BDR 15 producer index register RX BDR 15 consumer index register RX BDR 15 base address register 0 RX BDR 15 base address register 1 RX BDR 15 interrupt enable register RX BDR 15 interrupt coalescing register 0 RX BDR 15 interrupt coalescing register 1 Port SI promiscuous mode register Port SI0 primary MAC address register 0 Port SI0 primary MAC address register 1 Port HTA transmit memory buffer allocation register Port SI0 configuration register 0 Port traffic class 0 maximum SDU register Port eMAC Command and Configuration Register Port eMAC Maximum Frame Length Register Port eMAC Interface Mode Control Register Bus error: (unknown code, reserved) Transmit automatic polling every 200 seconds Transmit automatic polling every 800 seconds Transmit automatic polling every 1.6 milliseconds 16-longword boundary alignment 32-longword boundary alignment CFG = 0x%08x ESR = 0x%08x IER = 0x%08x TX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x RX|CASR = 0x%08x CARR = 0x%08x EOBISR = 0x%08x DEIR = 0x%08x This driver version doesn't support information output for EMAC area, please update it or use older ethtool version MR0 = 0x%08x MR1 = 0x%08x RMR = 0x%08x ISR = 0x%08x ISER = 0x%08x TMR0 = 0x%08x TMR1 = 0x%08x TRTR = 0x%08x RWMR = 0x%08x IAR = %04x%08x LSA = %04x%08x VTPID = 0x%04x VTCI = 0x%04x IPGVR = 0x%04x STACR = 0x%08x OCTX = 0x%08x OCRX = 0x%08x MAHR = 0x%08x MALR = 0x%08x MMAHR = 0x%08x MMALR = 0x%08x REVID = 0x%08x IAHT = 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x GAHT = 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x 0x%04x FER = %08x SSR = %08x SMIISR = %08x REVID = %08x MR = %08x TSR = %08x SSR0 = %08x SSR1 = %08x SSR2 = %08x SSR3 = %08x SSR4 = %08x SSR5 = %08x CSR0: Status and Control 0x%04x CSR3: Interrupt Mask 0x%04x CSR4: Test and Features 0x%04x CSR5: Ext Control and Int 1 0x%04x CSR7: Ext Control and Int 2 0x%04x CSR15: Mode 0x%04x CSR40: Current RX Byte Count 0x%04x CSR41: Current RX Status 0x%04x CSR42: Current TX Byte Count 0x%04x CSR43: Current TX Status 0x%04x CSR88: Chip ID Lower 0x%04x CSR89: Chip ID Upper 0x%04x CSR112: Missed Frame Count 0x%04x CSR114: RX Collision Count 0x%04x BCR2: Misc. Configuration 0x%04x BCR9: Full-Duplex Control 0x%04x BCR18: Burst and Bus Control 0x%04x BCR19: EEPROM Control and Status 0x%04x BCR23: PCI Subsystem Vendor ID 0x%04x BCR24: PCI Subsystem ID 0x%04x BCR31: Software Timer 0x%04x BCR32: MII Control and Status 0x%04x BCR35: PCI Vendor ID 0x%04x End Address 0x%08X Write Pointer 0x%08X Read Pointer 0x%08X Packet Counter 0x%08X Level 0x%08X Control 0x%08X Control/Test 0x%08X Test 0x%02X Control 0x%02X Connector type 0x%02X (%c) PMD type 0x%02X (%c) PHY type 0x%02X Chip Id 0x%02X Ram Buffer 0x%02X Status 0x%04X Control 0x%04X Transmit 0x%04X Receive 0x%04X Transmit flow control 0x%04X Transmit parameter 0x%04X Serial mode 0x%04X Register Access Port 0x%02X LED Control/Status 0x%08X Interrupt Source 0x%08X Interrupt Mask 0x%08X Interrupt Hardware Error Source 0x%08X Interrupt Hardware Error Mask 0x%08X Interrupt Control 0x%08X Interrupt Moderation Mask 0x%08X Hardware Moderation Mask 0x%08X General Purpose I/O 0x%08X Buffer control 0x%04X Byte Counter %d Descriptor Address 0x%08X%08X Status 0x%08X Timestamp 0x%08X BMU Control/Status 0x%08X Done 0x%04X Request 0x%08X%08X Csum1 Offset %4d Position %d Csum2 Offset %4d Position %d Csum Start 0x%04X Pos %4d Write %d Start Address 0x%08x%08x ethtool_regs %-20s = %04x %-20s = %04x 0x00000: CTRL0 (Device control register) 0x%08X Link reset: %s VLAN mode: %s 0x00010: STATUS (Device status register) 0x%08X Link up: %s Bus type: %s Bus speed: %s Bus width: %s 0x00100: RCTL (Receive control register) 0x%08X Receiver: %s Store bad packets: %s Unicast promiscuous: %s Multicast promiscuous: %s Descriptor minimum threshold size: %s Broadcast accept mode: %s VLAN filter: %s Cononical form indicator: %s 0x00120: RDLEN (Receive desc length) 0x%08X 0x00128: RDH (Receive desc head) 0x%08X 0x00130: RDT (Receive desc tail) 0x%08X 0x00138: RDTR (Receive delay timer) 0x%08X 0x00600: TCTL (Transmit ctrl register) 0x%08X Transmitter: %s 0x00610: TDLEN (Transmit desc length) 0x%08X 0x00618: TDH (Transmit desc head) 0x%08X 0x00620: TDT (Transmit desc tail) 0x%08X 0x00628: TIDV (Transmit delay timer) 0x%08X 0x042A4: LINKS (Link Status register) 0x%08X Link Status: %s Link Speed: %s 0x05080: FCTRL (Filter Control register) 0x%08X Broadcast Accept: %s Unicast Promiscuous: %s Multicast Promiscuous: %s Store Bad Packets: %s Receive Flow Control Packets: %s Receive Priority Flow Control Packets: %s Discard Pause Frames: %s Pass MAC Control Frames: %s 0x04294: MFLCN (TabMAC Flow Control register) 0x%08X Receive Flow Control Packets: %s Discard Pause Frames: %s Pass MAC Control Frames: %s Receive Priority Flow Control Packets: %s 0x05088: VLNCTRL (VLAN Control register) 0x%08X VLAN Mode: %s VLAN Filter: %s 0x02100: SRRCTL0 (Split and Replic Rx Control 0) 0x%08X Receive Buffer Size: %uKB 0x03D00: RMCS (Receive Music Control register) 0x%08X Transmit Flow Control: %s Priority Flow Control: %s 0x03D00: FCCFG (Flow Control Configuration) 0x%08X Transmit Flow Control: %s Priority Flow Control: %s 0x04240: HLREG0 (Highlander Control 0 register) 0x%08X Transmit CRC: %s Receive CRC Strip: %s Jumbo Frames: %s Pad Short Frames: %s Loopback: %s 0x00000: CTRL (Device Control) 0x%08X 0x00008: STATUS (Device Status) 0x%08X 0x00018: CTRL_EXT (Extended Device Control) 0x%08X 0x00020: ESDP (Extended SDP Control) 0x%08X 0x00028: EODSDP (Extended OD SDP Control) 0x%08X 0x00200: LEDCTL (LED Control) 0x%08X 0x00048: FRTIMER (Free Running Timer) 0x%08X 0x0004C: TCPTIMER (TCP Timer) 0x%08X 0x%05X: FLA (Flash Access) 0x%08X 0x10110: EEMNGCTL (Manageability EEPROM Control) 0x%08X 0x10114: EEMNGDATA (Manageability EEPROM R/W Data) 0x%08X 0x10118: FLMNGCTL (Manageability Flash Control) 0x%08X 0x1011C: FLMNGDATA (Manageability Flash Read Data) 0x%08X 0x10120: FLMNGCNT (Manageability Flash Read Count) 0x%08X 0x1013C: FLOP (Flash Opcode) 0x%08X 0x%05X: GRC (General Receive Control) 0x%08X 0x00800: EICR (Extended Interrupt Cause) 0x%08X 0x00808: EICS (Extended Interrupt Cause Set) 0x%08X 0x00880: EIMS (Extended Interr. Mask Set/Read) 0x%08X 0x00888: EIMC (Extended Interrupt Mask Clear) 0x%08X 0x00810: EIAC (Extended Interrupt Auto Clear) 0x%08X 0x00890: EIAM (Extended Interr. Auto Mask EN) 0x%08X 0x00820: EITR0 (Extended Interrupt Throttle 0) 0x%08X 0x00900: IVAR0 (Interrupt Vector Allocation 0) 0x%08X 0x00000: MSIXT (MSI-X Table) 0x%08X 0x02000: MSIXPBA (MSI-X Pending Bit Array) 0x%08X 0x11068: PBACL (MSI-X PBA Clear) 0x%08X 0x00898: GPIE (General Purpose Interrupt EN) 0x%08X 0x03008: PFCTOP (Priority Flow Ctrl Type Opcode) 0x%08X 0x%05X: FCCTV%d (Flow Ctrl Tx Timer Value %d) 0x%08X 0x%05X: FCRTL%d (Flow Ctrl Rx Threshold low %d) 0x%08X 0x%05X: FCRTH%d (Flow Ctrl Rx Threshold High %d) 0x%08X 0x032A0: FCRTV (Flow Control Refresh Threshold) 0x%08X 0x0CE00: TFCS (Transmit Flow Control Status) 0x%08X 0x%05X: RDBAL%02d (Rx Desc Base Addr Low %02d) 0x%08X 0x%05X: RDBAH%02d (Rx Desc Base Addr High %02d) 0x%08X 0x%05X: RDLEN%02d (Receive Descriptor Length %02d) 0x%08X 0x%05X: RDH%02d (Receive Descriptor Head %02d) 0x%08X 0x%05X: RDT%02d (Receive Descriptor Tail %02d) 0x%08X 0x%05X: RXDCTL%02d (Receive Descriptor Control %02d) 0x%08X 0x%05X: SRRCTL%02d (Split and Replic Rx Control %02d) 0x%08X 0x%05X: DCA_RXCTRL%02d (Rx DCA Control %02d) 0x%08X 0x02F00: RDRXCTL (Receive DMA Control) 0x%08X 0x%05X: RXPBSIZE%d (Receive Packet Buffer Size %d) 0x%08X 0x03000: RXCTRL (Receive Control) 0x%08X 0x03D04: DROPEN (Drop Enable Control) 0x%08X 0x05000: RXCSUM (Receive Checksum Control) 0x%08X 0x05008: RFCTL (Receive Filter Control) 0x%08X 0x%05X: RAL%02d (Receive Address Low%02d) 0x%08X 0x%05X: RAH%02d (Receive Address High %02d) 0x%08X 0x05480: PSRTYPE (Packet Split Receive Type) 0x%08X 0x05090: MCSTCTRL (Multicast Control) 0x%08X 0x05818: MRQC (Multiple Rx Queues Command) 0x%08X 0x0581C: VMD_CTL (VMDq Control) 0x%08X 0x%05X: IMIR%d (Immediate Interrupt Rx %d) 0x%08X 0x%05X: IMIREXT%d (Immed. Interr. Rx Extended %d) 0x%08X 0x05AC0: IMIRVP (Immed. Interr. Rx VLAN Prior.) 0x%08X 0x%05X: TDBAL%02d (Tx Desc Base Addr Low %02d) 0x%08X 0x%05X: TDBAH%02d (Tx Desc Base Addr High %02d) 0x%08X 0x%05X: TDLEN%02d (Tx Descriptor Length %02d) 0x%08X 0x%05X: TDH%02d (Transmit Descriptor Head %02d) 0x%08X 0x%05X: TDT%02d (Transmit Descriptor Tail %02d) 0x%08X 0x%05X: TXDCTL%02d (Tx Descriptor Control %02d) 0x%08X 0x%05X: TDWBAL%02d (Tx Desc Compl. WB Addr low %02d) 0x%08X 0x%05X: TDWBAH%02d (Tx Desc Compl. WB Addr High %02d) 0x%08X 0x07E00: DTXCTL (DMA Tx Control) 0x%08X 0x%05X: DCA_TXCTRL%02d (Tx DCA Control %02d) 0x%08X 0x0CB00: TIPG (Transmit IPG Control) 0x%08X 0x%05X: TXPBSIZE%d (Transmit Packet Buffer Size %d) 0x%08X 0x0CD10: MNGTXMAP (Manageability Tx TC Mapping) 0x%08X 0x05800: WUC (Wake up Control) 0x%08X 0x05808: WUFC (Wake Up Filter Control) 0x%08X 0x05810: WUS (Wake Up Status) 0x%08X 0x05838: IPAV (IP Address Valid) 0x%08X 0x05840: IP4AT (IPv4 Address Table) 0x%08X 0x05880: IP6AT (IPv6 Address Table) 0x%08X 0x05900: WUPL (Wake Up Packet Length) 0x%08X 0x05A00: WUPM (Wake Up Packet Memory) 0x%08X 0x09000: FHFT (Flexible Host Filter Table) 0x%08X 0x07F40: DPMCS (Desc. Plan Music Ctrl Status) 0x%08X 0x0CD00: PDPMCS (Pkt Data Plan Music ctrl Stat) 0x%08X 0x050A0: RUPPBMR (Rx User Prior to Pkt Buff Map) 0x%08X 0x%05X: RT2CR%d (Receive T2 Configure %d) 0x%08X 0x%05X: RT2SR%d (Receive T2 Status %d) 0x%08X 0x%05X: TDTQ2TCCR%d (Tx Desc TQ2 TC Config %d) 0x%08X 0x%05X: TDTQ2TCSR%d (Tx Desc TQ2 TC Status %d) 0x%08X 0x%05X: TDPT2TCCR%d (Tx Data Plane T2 TC Config %d) 0x%08X 0x%05X: TDPT2TCSR%d (Tx Data Plane T2 TC Status %d) 0x%08X 0x04900: RTTDCS (Tx Descr Plane Ctrl&Status) 0x%08X 0x0CD00: RTTPCS (Tx Pkt Plane Ctrl&Status) 0x%08X 0x02430: RTRPCS (Rx Packet Plane Ctrl&Status) 0x%08X 0x%05X: RTRPT4C%d (Rx Packet Plane T4 Config %d) 0x%08X 0x%05X: RTRPT4S%d (Rx Packet Plane T4 Status %d) 0x%08X 0x%05X: RTTDT2C%d (Tx Descr Plane T2 Config %d) 0x%08X 0x%05X: RTTDT2S%d (Tx Descr Plane T2 Status %d) 0x%08X 0x%05X: RTTPT2C%d (Tx Packet Plane T2 Config %d) 0x%08X 0x%05X: RTTPT2S%d (Tx Packet Plane T2 Status %d) 0x%08X 0x03020: RTRUP2TC (Rx User Prio to Traffic Classes)0x%08X 0x0C800: RTTUP2TC (Tx User Prio to Traffic Classes)0x%08X 0x%05X: TXLLQ%d (Strict Low Lat Tx Queues %d) 0x%08X 0x04980: RTTBCNRM (DCB TX Rate Sched MMW) 0x%08X 0x0498C: RTTBCNRD (DCB TX Rate-Scheduler Drift) 0x%08X 0x04980: RTTQCNRM (DCB TX QCN Rate Sched MMW) 0x%08X 0x0498C: RTTQCNRR (DCB TX QCN Rate Reset) 0x%08X 0x08B00: RTTQCNCR (DCB TX QCN Control) 0x%08X 0x04A90: RTTQCNTG (DCB TX QCN Tagging) 0x%08X 0x04000: crcerrs (CRC Error Count) 0x%08X 0x04004: illerrc (Illegal Byte Error Count) 0x%08X 0x04008: errbc (Error Byte Count) 0x%08X 0x04010: mspdc (MAC Short Packet Discard Count) 0x%08X 0x%05X: mpc%d (Missed Packets Count %d) 0x%08X 0x04034: mlfc (MAC Local Fault Count) 0x%08X 0x04038: mrfc (MAC Remote Fault Count) 0x%08X 0x04040: rlec (Receive Length Error Count) 0x%08X 0x03F60: lxontxc (Link XON Transmitted Count) 0x%08X 0x0CF60: lxonrxc (Link XON Received Count) 0x%08X 0x03F68: lxofftxc (Link XOFF Transmitted Count) 0x%08X 0x0CF68: lxoffrxc (Link XOFF Received Count) 0x%08X 0x%05X: pxontxc%d (Priority XON Tx Count %d) 0x%08X 0x%05X: pxonrxc%d (Priority XON Received Count %d) 0x%08X 0x%05X: pxofftxc%d (Priority XOFF Tx Count %d) 0x%08X 0x%05X: pxoffrxc%d (Priority XOFF Received Count %d) 0x%08X 0x0405C: prc64 (Packets Received (64B) Count) 0x%08X 0x04060: prc127 (Packets Rx (65-127B) Count) 0x%08X 0x04064: prc255 (Packets Rx (128-255B) Count) 0x%08X 0x04068: prc511 (Packets Rx (256-511B) Count) 0x%08X 0x0406C: prc1023 (Packets Rx (512-1023B) Count) 0x%08X 0x04070: prc1522 (Packets Rx (1024-Max) Count) 0x%08X 0x04074: gprc (Good Packets Received Count) 0x%08X 0x04078: bprc (Broadcast Packets Rx Count) 0x%08X 0x0407C: mprc (Multicast Packets Rx Count) 0x%08X 0x04080: gptc (Good Packets Transmitted Count) 0x%08X 0x04088: gorcl (Good Octets Rx Count Low) 0x%08X 0x0408C: gorch (Good Octets Rx Count High) 0x%08X 0x04090: gotcl (Good Octets Tx Count Low) 0x%08X 0x04094: gotch (Good Octets Tx Count High) 0x%08X 0x%05X: rnbc%d (Receive No Buffers Count %d) 0x%08X 0x040A4: ruc (Receive Undersize count) 0x%08X 0x040A8: rfc (Receive Fragment Count) 0x%08X 0x040AC: roc (Receive Oversize Count) 0x%08X 0x040B0: rjc (Receive Jabber Count) 0x%08X 0x040B4: mngprc (Management Packets Rx Count) 0x%08X 0x040B8: mngpdc (Management Pkts Dropped Count) 0x%08X 0x0CF90: mngptc (Management Packets Tx Count) 0x%08X 0x040C0: torl (Total Octets Rx Count Low) 0x%08X 0x040C4: torh (Total Octets Rx Count High) 0x%08X 0x040D0: tpr (Total Packets Received) 0x%08X 0x040D4: tpt (Total Packets Transmitted) 0x%08X 0x040D8: ptc64 (Packets Tx (64B) Count) 0x%08X 0x040DC: ptc127 (Packets Tx (65-127B) Count) 0x%08X 0x040E0: ptc255 (Packets Tx (128-255B) Count) 0x%08X 0x040E4: ptc511 (Packets Tx (256-511B) Count) 0x%08X 0x040E8: ptc1023 (Packets Tx (512-1023B) Count) 0x%08X 0x040EC: ptc1522 (Packets Tx (1024-Max) Count) 0x%08X 0x040F0: mptc (Multicast Packets Tx Count) 0x%08X 0x040F4: bptc (Broadcast Packets Tx Count) 0x%08X 0x04120: xec (XSUM Error Count) 0x%08X 0x%05X: qprc%02d (Queue Packets Rx Count %02d) 0x%08X 0x%05X: qptc%02d (Queue Packets Tx Count %02d) 0x%08X 0x%05X: qbrc%02d (Queue Bytes Rx Count %02d) 0x%08X 0x%05X: qbtc%02d (Queue Bytes Tx Count %02d) 0x%08X 0x04200: PCS1GCFIG (PCS_1G Gloabal Config 1) 0x%08X 0x04208: PCS1GLCTL (PCS_1G Link Control) 0x%08X 0x0420C: PCS1GLSTA (PCS_1G Link Status) 0x%08X 0x04210: PCS1GDBG0 (PCS_1G Debug 0) 0x%08X 0x04214: PCS1GDBG1 (PCS_1G Debug 1) 0x%08X 0x04218: PCS1GANA (PCS-1G Auto Neg. Adv.) 0x%08X 0x0421C: PCS1GANLP (PCS-1G AN LP Ability) 0x%08X 0x04220: PCS1GANNP (PCS_1G Auto Neg Next Page Tx) 0x%08X 0x04224: PCS1GANLPNP (PCS_1G Auto Neg LPs Next Page) 0x%08X 0x04244: HLREG1 (Highlander Status 1) 0x%08X 0x04248: PAP (Pause and Pace) 0x%08X 0x0424C: MACA (MDI Auto-Scan Command and Addr) 0x%08X 0x04250: APAE (Auto-Scan PHY Address Enable) 0x%08X 0x04254: ARD (Auto-Scan Read Data) 0x%08X 0x04258: AIS (Auto-Scan Interrupt Status) 0x%08X 0x0425C: MSCA (MDI Single Command and Addr) 0x%08X 0x04260: MSRWD (MDI Single Read and Write Data) 0x%08X 0x04264: MLADD (MAC Address Low) 0x%08X 0x04268: MHADD (MAC Addr High/Max Frame size) 0x%08X 0x0426C: TREG (Test Register) 0x%08X 0x04288: PCSS1 (XGXS Status 1) 0x%08X 0x0428C: PCSS2 (XGXS Status 2) 0x%08X 0x04290: XPCSS (10GBASE-X PCS Status) 0x%08X 0x04298: SERDESC (SERDES Interface Control) 0x%08X 0x0429C: MACS (FIFO Status/CNTL Report) 0x%08X 0x042A0: AUTOC (Auto Negotiation Control) 0x%08X 0x042A8: AUTOC2 (Auto Negotiation Control 2) 0x%08X 0x042AC: AUTOC3 (Auto Negotiation Control 3) 0x%08X 0x042B0: ANLP1 (Auto Neg Lnk Part. Ctrl Word 1) 0x%08X 0x042B4: ANLP2 (Auto Neg Lnk Part. Ctrl Word 2) 0x%08X 0x04800: ATLASCTL (Atlas Analog Configuration) 0x%08X 0x02C20: RDSTATCTL (Rx DMA Statistic Control) 0x%08X 0x%05X: RDSTAT%d (Rx DMA Statistics %d) 0x%08X 0x02F08: RDHMPN (Rx Desc Handler Mem Page num) 0x%08X 0x02F10: RIC_DW0 (Rx Desc Hand. Mem Read Data 0) 0x%08X 0x02F14: RIC_DW1 (Rx Desc Hand. Mem Read Data 1) 0x%08X 0x02F18: RIC_DW2 (Rx Desc Hand. Mem Read Data 2) 0x%08X 0x02F1C: RIC_DW3 (Rx Desc Hand. Mem Read Data 3) 0x%08X 0x02F20: RDPROBE (Rx Probe Mode Status) 0x%08X 0x07C20: TDSTATCTL (Tx DMA Statistic Control) 0x%08X 0x%05X: TDSTAT%d (Tx DMA Statistics %d) 0x%08X 0x07F08: TDHMPN (Tx Desc Handler Mem Page Num) 0x%08X 0x%05X: TIC_DW%d (Tx Desc Hand. Mem Read Data %d) 0x%08X 0x07F20: TDPROBE (Tx Probe Mode Status) 0x%08X 0x0C600: TXBUFCTRL (TX Buffer Access Control) 0x%08X 0x%05X: TXBUFDATA%d (TX Buffer DATA %d) 0x%08X 0x03600: RXBUFCTRL (RX Buffer Access Control) 0x%08X 0x%05X: RXBUFDATA%d (RX Buffer DATA %d) 0x%08X 0x%05X: PCIE_DIAG%d (PCIe Diagnostic %d) 0x%08X 0x050A4: RFVAL (Receive Filter Validation) 0x%08X 0x042B8: MDFTC1 (MAC DFT Control 1) 0x%08X 0x042C0: MDFTC2 (MAC DFT Control 2) 0x%08X 0x042C4: MDFTFIFO1 (MAC DFT FIFO 1) 0x%08X 0x042C8: MDFTFIFO2 (MAC DFT FIFO 2) 0x%08X 0x042CC: MDFTS (MAC DFT Status) 0x%08X 0x1106C: PCIEECCCTL (PCIe ECC Control) 0x%08X 0x0C300: PBTXECC (Packet Buffer Tx ECC) 0x%08X 0x03300: PBRXECC (Packet Buffer Rx ECC) 0x%08X 0x08800: SECTXCTRL (Security Tx Control) 0x%08X 0x08804: SECTXSTAT (Security Tx Status) 0x%08X 0x08808: SECTXBUFFAF (Security Tx Buffer Almost Full) 0x%08X 0x08800: SECTXMINIFG (Security Tx Buffer Minimum IFG) 0x%08X 0x08800: SECRXCTRL (Security Rx Control) 0x%08X 0x08800: SECRXSTAT (Security Rx Status) 0x%08X 0x%05X: EEC (EEPROM/Flash Control) 0x%08X 0x10014: EERD (EEPROM Read) 0x%08X 0x00: CR (Command): 0x%08x Transmit %s Receive %s 0x04: CFG (Configuration): 0x%08x %s Endian Boot ROM %s Internal Phy %s Phy Reset %s External Phy %s Default Auto-Negotiation %s, %s %s Mb %s Duplex Phy Interrupt %sAuto-Cleared Phy Configuration = 0x%02x Auto-Negotiation %s %s Polarity %s Duplex %d Mb/s Link %s 0x08: MEAR (EEPROM Access): 0x%08x 0x0c: PTSCR (PCI Test Control): 0x%08x EEPROM Self Test %s Rx Filter Self Test %s Tx FIFO Self Test %s Rx FIFO Self Test %s EEPROM Reload In Progress 0x10: ISR (Interrupt Status): 0x%08x 0x14: IMR (Interrupt Mask): 0x%08x 0x18: IER (Interrupt Enable): 0x%08x 0x20: TXDP (Tx Descriptor Pointer): 0x%08x 0x24: TXCFG (Tx Config): 0x%08x Drain Threshold = %d bytes (%d) Fill Threshold = %d bytes (%d) Max DMA Burst per Tx = %d bytes Automatic Tx Padding %s Mac Loopback %s Heartbeat Ignore %s Carrier Sense Ignore %s 0x30: RXDP (Rx Descriptor Pointer): 0x%08x 0x34: RXCFG (Rx Config): 0x%08x Drain Threshold = %d bytes (%d) Max DMA Burst per Rx = %d bytes Long Packets %s Tx Packets %s Runt Packets %s Error Packets %s 0x3c: CCSR (CLKRUN Control/Status): 0x%08x CLKRUNN %s Power Management %s Power Management Event Pending 0x40: WCSR (Wake-on-LAN Control/Status): 0x%08x Wake on Phy Interrupt Enabled Wake on Unicast Packet Enabled Wake on Multicast Packet Enabled Wake on Broadcast Packet Enabled Wake on Pattern 0 Match Enabled Wake on Pattern 1 Match Enabled Wake on Pattern 2 Match Enabled Wake on Pattern 3 Match Enabled Wake on Magic Packet Enabled Magic Packet SecureOn Enabled Unicast Packet Received Multicast Packet Received Broadcast Packet Received 0x44: PCR (Pause Control/Status): 0x%08x Pause Counter = %d Pause %sNegotiated Pause on DA %s Pause on Mulitcast %s Pause %s PS_RCVD: Pause Frame Received 0x48: RFCR (Rx Filter Control): 0x%08x Unicast Hash %s Multicast Hash %s Arp %s Pattern 0 Match %s Pattern 1 Match %s Pattern 2 Match %s Pattern 3 Match %s Perfect Match %s All Unicast %s All Multicast %s All Broadcast %s Rx Filter %s 0x4c: RFDR (Rx Filter Data): 0x%08x PMATCH 1-0 = 0x%08x PMATCH 3-2 = 0x%08x PMATCH 5-4 = 0x%08x PCOUNT 1-0 = 0x%08x PCOUNT 3-2 = 0x%08x SOPASS 1-0 = 0x%08x SOPASS 3-2 = 0x%08x SOPASS 5-4 = 0x%08x 0x50: BRAR (Boot ROM Address): 0x%08x Automatically Increment Address 0x54: BRDR (Boot ROM Data): 0x%08x 0x58: SRR (Silicon Revision): 0x%08x 0x5c: MIBC (Mgmt Info Base Control): 0x%08x Counter Overflow Warning 0x60: MIB[0] (Rx Errored Packets): 0x%04x 0x64: MIB[1] (Rx Frame Sequence Errors): 0x%02x 0x68: MIB[2] (Rx Missed Packets): 0x%02x 0x6c: MIB[3] (Rx Alignment Errors): 0x%02x 0x70: MIB[4] (Rx Symbol Errors): 0x%02x 0x74: MIB[5] (Rx Long Frame Errors): 0x%02x 0x78: MIB[6] (Tx Heartbeat Errors): 0x%02x 0x80: BMCR (Basic Mode Control): 0x%04x %s Duplex Port is Powered %s Auto-Negotiation %s %d Mb/s Auto-Negotiation Restarting 0x84: BMSR (Basic Mode Status): 0x%04x Link %s %sCapable of Auto-Negotiation Auto-Negotiation %sComplete %sCapable of Preamble Suppression %sCapable of 10Base-T Half Duplex %sCapable of 10Base-T Full Duplex %sCapable of 100Base-TX Half Duplex %sCapable of 100Base-TX Full Duplex %sCapable of 100Base-T4 Jabber Condition Detected 0x88: PHYIDR1 (PHY ID #1): 0x%04x 0x8c: PHYIDR2 (PHY ID #2): 0x%04x OUI = 0x%06x Model = 0x%02x (%d) Revision = 0x%01x (%d) 0x90: ANAR (Autoneg Advertising): 0x%04x Protocol Selector = 0x%02x (%d) Advertising 10Base-T Half Duplex Advertising 10Base-T Full Duplex Advertising 100Base-TX Half Duplex Advertising 100Base-TX Full Duplex Indicating Remote Fault 0x94: ANLPAR (Autoneg Partner): 0x%04x Supports 10Base-T Half Duplex Supports 10Base-T Full Duplex Supports 100Base-TX Half Duplex Supports 100Base-TX Full Duplex Indicates Acknowledgement 0x98: ANER (Autoneg Expansion): 0x%04x Link Partner Can %sAuto-Negotiate Link Code Word %sReceived Next Page %sSupported Link Partner Next Page %sSupported Parallel Detection Fault 0x9c: ANNPTR (Autoneg Next Page Tx): 0x%04x 0xc0: PHYSTS (Phy Status): 0x%04x Link %s %d Mb/s %s Duplex Auto-Negotiation %sComplete %s Polarity 0xc4: MICR (MII Interrupt Control): 0x%04x 0xc8: MISR (MII Interrupt Status): 0x%04x Rx Error Counter Half-Full Interrupt %s False Carrier Counter Half-Full Interrupt %s Auto-Negotiation Complete Interrupt %s Remote Fault Interrupt %s Jabber Interrupt %s Link Change Interrupt %s 0xcc: PGSEL (Phy Register Page Select): 0x%04x 0xd0: FCSCR (False Carrier Counter): 0x%04x 0xd4: RECR (Rx Error Counter): 0x%04x 0xd8: PCSR (100Mb/s PCS Config/Status): 0x%04x NRZI Bypass %s %s Signal Detect Algorithm %s Signal Detect Operation True Quiet Mode %s Rx Clock is %s 4B/5B Operation %s Forced 100 Mb/s Good Link 0xe4: PHYCR (Phy Control): 0x%04x Phy Address = 0x%x (%d) %sPause Compatible with Link Partner LED Stretching %s Phy Self Test %s Self Test Sequence = PSR%d 0xe8: TBTSCR (10Base-T Status/Control): 0x%04x Jabber %s Heartbeat %s Polarity Auto-Sense/Correct %s %s Polarity %s Normal Link Pulse %s 10 Mb/s Loopback %s Forced 10 Mb/s Good Link 0xe4: PMDCSR: 0x%04x 0xf4: DSPCFG: 0x%04x 0xf8: SDCFG: 0x%04x 0xfc: TSTDAT: 0x%04x RealTek RTL%s registers: -------------------------------------------------------- 0x00: MAC Address %02x:%02x:%02x:%02x:%02x:%02x 0x08: Multicast Address Filter 0x%08x 0x%08x Unknown RealTek chip (TxConfig: 0x%08x) 0x10: Dump Tally Counter Command 0x%08x 0x%08x 0x20: Tx Normal Priority Ring Addr 0x%08x 0x%08x 0x28: Tx High Priority Ring Addr 0x%08x 0x%08x 0x10: Transmit Status Desc 0 0x%08x 0x14: Transmit Status Desc 1 0x%08x 0x18: Transmit Status Desc 2 0x%08x 0x1C: Transmit Status Desc 3 0x%08x 0x20: Transmit Start Addr 0 0x%08x 0x24: Transmit Start Addr 1 0x%08x 0x28: Transmit Start Addr 2 0x%08x 0x2C: Transmit Start Addr 3 0x%08x 0x30: Flash memory read/write 0x%08x 0x30: Rx buffer addr (C mode) 0x%08x 0x34: Early Rx Byte Count %8u 0x36: Early Rx Status 0x%02x 0x37: Command 0x%02x Rx %s, Tx %s%s 0x38: Current Address of Packet Read (C mode) 0x%04x 0x3A: Current Rx buffer address (C mode) 0x%04x 0x3C: Interrupt Mask 0x%04x 0x3E: Interrupt Status 0x%04x 0x40: Tx Configuration 0x%08x 0x44: Rx Configuration 0x%08x 0x48: Timer count 0x%08x 0x4C: Missed packet counter 0x%06x 0x50: EEPROM Command 0x%02x 0x51: Config 0 0x%02x 0x52: Config 1 0x%02x 0x53: Config 2 0x%02x 0x54: Config 3 0x%02x 0x55: Config 4 0x%02x 0x56: Config 5 0x%02x 0x58: Timer interrupt 0x%08x 0x5C: Multiple Interrupt Select 0x%04x 0x60: PHY access 0x%08x 0x54: Timer interrupt 0x%08x 0x58: Media status 0x%02x 0x59: Config 3 0x%02x 0x5A: Config 4 0x%02x 0x64: TBI control and status 0x%08x 0x68: TBI Autonegotiation advertisement (ANAR) 0x%04x 0x6A: TBI Link partner ability (LPAR) 0x%04x 0x6C: PHY status 0x%02x 0x84: PM wakeup frame 0 0x%08x 0x%08x 0x8C: PM wakeup frame 1 0x%08x 0x%08x 0x94: PM wakeup frame 2 (low) 0x%08x 0x%08x 0x9C: PM wakeup frame 2 (high) 0x%08x 0x%08x 0xA4: PM wakeup frame 3 (low) 0x%08x 0x%08x 0xAC: PM wakeup frame 3 (high) 0x%08x 0x%08x 0xB4: PM wakeup frame 4 (low) 0x%08x 0x%08x 0xBC: PM wakeup frame 4 (high) 0x%08x 0x%08x 0xC4: Wakeup frame 0 CRC 0x%04x 0xC6: Wakeup frame 1 CRC 0x%04x 0xC8: Wakeup frame 2 CRC 0x%04x 0xCA: Wakeup frame 3 CRC 0x%04x 0xCC: Wakeup frame 4 CRC 0x%04x 0xDA: RX packet maximum size 0x%04x 0x78: PHY parameter 1 0x%08x 0x7C: Twister parameter 0x%08x 0x80: PHY parameter 2 0x%02x 0x82: Low addr of a Tx Desc w/ Tx DMA OK 0x%04x 0x82: MII register 0x%02x 0x84: PM CRC for wakeup frame 0 0x%02x 0x85: PM CRC for wakeup frame 1 0x%02x 0x86: PM CRC for wakeup frame 2 0x%02x 0x87: PM CRC for wakeup frame 3 0x%02x 0x88: PM CRC for wakeup frame 4 0x%02x 0x89: PM CRC for wakeup frame 5 0x%02x 0x8A: PM CRC for wakeup frame 6 0x%02x 0x8B: PM CRC for wakeup frame 7 0x%02x 0x8C: PM wakeup frame 0 0x%08x 0x%08x 0x94: PM wakeup frame 1 0x%08x 0x%08x 0x9C: PM wakeup frame 2 0x%08x 0x%08x 0xA4: PM wakeup frame 3 0x%08x 0x%08x 0xAC: PM wakeup frame 4 0x%08x 0x%08x 0xB4: PM wakeup frame 5 0x%08x 0x%08x 0xBC: PM wakeup frame 6 0x%08x 0x%08x 0xC4: PM wakeup frame 7 0x%08x 0x%08x 0xCC: PM LSB CRC for wakeup frame 0 0x%02x 0xCD: PM LSB CRC for wakeup frame 1 0x%02x 0xCE: PM LSB CRC for wakeup frame 2 0x%02x 0xCF: PM LSB CRC for wakeup frame 3 0x%02x 0xD0: PM LSB CRC for wakeup frame 4 0x%02x 0xD1: PM LSB CRC for wakeup frame 5 0x%02x 0xD2: PM LSB CRC for wakeup frame 6 0x%02x 0xD3: PM LSB CRC for wakeup frame 7 0x%02x 0xD8: Config 5 0x%02x 0xD4: Flash memory read/write 0x%08x 0xE0: C+ Command 0x%04x 0xE2: Interrupt Mitigation 0x%04x TxTimer: %u TxPackets: %u RxTimer: %u RxPackets: %u 0xE4: Rx Ring Addr 0x%08x 0x%08x 0xEC: Early Tx threshold 0x%02x 0xFC: External MII register 0x%08x 0xF0: Func Event 0x%08x 0xF4: Func Event Mask 0x%08x 0xF8: Func Preset State 0x%08x 0xFC: Func Force Event 0x%08x 0x5E: PCI revision id 0x%02x 0x60: Transmit Status of All Desc (C mode) 0x%04x 0x62: MII Basic Mode Control Register 0x%04x 0x64: MII Basic Mode Status Register 0x%04x 0x66: MII Autonegotiation Advertising 0x%04x 0x68: MII Link Partner Ability 0x%04x 0x6A: MII Expansion 0x%04x 0x6C: MII Disconnect counter 0x%04x 0x6E: MII False carrier sense counter 0x%04x 0x70: MII Nway test 0x%04x 0x72: MII RX_ER counter 0x%04x 0x74: MII CS configuration 0x%04x offset 0x50, ID_REV = 0x%08X offset 0x54, INT_CFG = 0x%08X offset 0x58, INT_STS = 0x%08X offset 0x5C, INT_EN = 0x%08X offset 0x60, RESERVED = 0x%08X offset 0x64, BYTE_TEST = 0x%08X offset 0x68, FIFO_INT = 0x%08X offset 0x6C, RX_CFG = 0x%08X offset 0x70, TX_CFG = 0x%08X offset 0x74, HW_CFG = 0x%08X offset 0x78, RX_DP_CTRL = 0x%08X offset 0x7C, RX_FIFO_INF = 0x%08X offset 0x80, TX_FIFO_INF = 0x%08X offset 0x84, PMT_CTRL = 0x%08X offset 0x88, GPIO_CFG = 0x%08X offset 0x8C, GPT_CFG = 0x%08X offset 0x90, GPT_CNT = 0x%08X offset 0x94, FPGA_REV = 0x%08X offset 0x98, ENDIAN = 0x%08X offset 0x9C, FREE_RUN = 0x%08X offset 0xA0, RX_DROP = 0x%08X offset 0xA4, MAC_CSR_CMD = 0x%08X offset 0xA8, MAC_CSR_DATA = 0x%08X offset 0xAC, AFC_CFG = 0x%08X offset 0xB0, E2P_CMD = 0x%08X offset 0xB4, E2P_DATA = 0x%08X index 0, Basic Control Reg = 0x%04X index 1, Basic Status Reg = 0x%04X index 2, PHY identifier 1 = 0x%04X index 3, PHY identifier 2 = 0x%04X index 4, Auto Negotiation Advertisement Reg = 0x%04X index 5, Auto Negotiation Link Partner Ability Reg = 0x%04X index 6, Auto Negotiation Expansion Register = 0x%04X index 16, Silicon Revision Reg = 0x%04X index 17, Mode Control/Status Reg = 0x%04X index 18, Special Modes = 0x%04X index 27, Control/Status Indication = 0x%04X index 28, Special internal testability = 0x%04X index 29, Interrupt Source Register = 0x%04X index 30, Interrupt Mask Register = 0x%04X index 31, PHY Special Control/Status Register = 0x%04X Hardware Version %s Start Address 0x%08X Upper Threshold/Pause Packets 0x%08X Lower Threshold/Pause Packets 0x%08X Upper Threshold/High Priority 0x%08X Lower Threshold/High Priority 0x%08X Descriptor Address 0x%08X%08X Address Counter 0x%08X%08X Current Byte Counter %d Flag & FIFO Address 0x%08X Next 0x%08X Data 0x%08X%08X CSR Receive Queue 1 0x%08X CSR Sync Queue 1 0x%08X CSR Async Queue 1 0x%08X CSR Receive Queue 2 0x%08X CSR Async Queue 2 0x%08X CSR Sync Queue 2 0x%08X Write Pointer 0x%02X Read Pointer 0x%02X Level 0x%02X Watermark 0x%02X ISR Watermark 0x%02X GMAC control 0x%04X GPHY control 0x%04X LINK control 0x%02hX (Fibre Channel Style 1 copper) (Fibre Channel Style 2 copper) (Fibre Channel coaxial headers) ((256B/257B (transcoded FEC-enabled data)) %04d: RCTL (Receive Control Register) Receiver: %s Stop Bad Packets: %s Unicast Promiscuous: %s Multicast Promiscuous: %s Long Packet Reception: %s Loopback Model: %s Hash Select for MTA: %s Multicast/Unicast Table Offset: %s Broadcast Accept Mode: %s Receive Buffer Size: %s VLAN Filter: %s Canonical Form Indicator: %s Canonical Form Indicator Bit: %s Pad Small Receive Packets: %s Discard Pause Frames: %s Pass MAC Control Frames: %s Strip Ethernet CRC: %s %04d: RAL (Receive Address Low %02d) Receive Address Low: %08X %04d: RAH (Receive Address High %02d) Receive Address High: %04X Address Select: %s Queue Select: %d Queue Select Enable: %s Address Valid: %s %04d: VLANPQF (VLAN Priority Queue Filter) Priority 0 Queue: %d Packet Buffer: %s Valid: %s Priority 1 Queue: %d Packet Buffer: %s Valid: %s Priority 2 Queue: %d Packet Buffer: %s Valid: %s Priority 3 Queue: %d Packet Buffer: %s Valid: %s Priority 4 Queue: %d Packet Buffer: %s Valid: %s Priority 5 Queue: %d Packet Buffer: %s Valid: %s Priority 6 Queue: %d Packet Buffer: %s Valid: %s Priority 7 Queue: %d Packet Buffer: %s Valid: %s %04d: ETQF (EType Queue Filter %d) EType: %04X EType Length: %d EType Length Enable: %s Queue: %d Queue Enable: %s Immediate Interrupt: %s 1588 Time Stamp: %s Filter Enable: %s 0x00000: VFCTRL (VF Control Register) (Write Only) N/A 0x00008: VFSTATUS (VF Status Register) 0x%08X 0x00010: VFLINKS (VF Link Status Register) 0x%08X 0x03190: VFRXMEMWRAP (Rx Packet Buffer Flush Detect) 0x%08X 0x00048: VFFRTIMER (VF Free Running Timer) 0x%08X 0x00100: VFEICR (VF Extended Interrupt Cause) 0x%08X 0x00104: VFEICS (VF Extended Interrupt Cause Set) 0x%08X 0x00108: VFEIMS (VF Extended Interrupt Mask Set) 0x%08X 0x0010C: VFEIMC (VF Extended Interrupt Mask Clear) 0x%08X 0x00110: VFEIAC (VF Extended Interrupt Auto Clear) 0x%08X 0x00114: VFEIAM (VF Extended Interrupt Auto Mask) 0x%08X 0x00820: VFEITR(0) (VF Extended Interrupt Throttle) 0x%08X 0x00120: VFIVAR(0) (VF Interrupt Vector Allocation) 0x%08X 0x00140: VFIVAR_MISC (VF Interrupt Vector Misc) 0x%08X 0x00104: VFPSRTYPE (VF Replication Packet Split Type) 0x%08X 0x%05x: VFRDBAL(%d) (VF Rx Desc. Base Addr Low %d) 0x%08X 0x%05x: VFRDBAH(%d) (VF Rx Desc. Base Addr High %d) 0x%08X 0x%05x: VFRDLEN(%d) (VF Rx Desc. Length %d) 0x%08X 0x%05x: VFRDH(%d) (VF Rx Desc. Head %d) 0x%08X 0x%05x: VFRDT(%d) (VF Rx Desc. Tail %d) 0x%08X 0x%05x: VFRDT(%d) (VF Rx Desc. Control %d), 0x%08X 0x%05x: VFSRRCTL(%d) (VF Split Rx Control %d) 0x%08X 0x%05x: VFTDBAL(%d) (VF Tx Desc. Base Addr Low %d) 0x%08X 0x%05x: VFTDBAH(%d) (VF Tx Desc. Base Addr High %d) 0x%08X 0x%05x: VFTDLEN(%d) (VF Tx Desc. Length %d) 0x%08X 0x%05x: VFTDH(%d) (VF Tx Desc. Head %d) 0x%08X 0x%05x: VFTDT(%d) (VF Tx Desc. Tail %d) 0x%08X 0x%05x: VFTDT(%d) (VF Tx Desc. Control %d) 0x%08X 0x%05x: VFTDWBAL(%d) (VF Tx Desc. Write Back Addr Lo %d) 0x%08X 0x%05x: VFTDWBAH(%d) (VF Tx Desc. Write Back Addr Hi %d) 0x%08X Altera TSE 10/100/1000 Registers, Version %d --------------------------------------------- Revision 0x%08X CustVersion 0x%08X Scratch 0x%08X Command/Config 0x%08X mac_0 0x%08X mac_1 0x%08X frm_length 0x%08X pause_quant 0x%08X rx_section_empty 0x%08X rx_section_full 0x%08X tx_section_empty 0x%08X tx_section_full 0x%08X rx_almost_empty 0x%08X rx_almost_full 0x%08X tx_almost_empty 0x%08X tx_almost_full 0x%08X mdio_addr0 0x%08X mdio_addr1 0x%08X holdoff_quant 0x%08X tx_ipg_length 0x%08X Transmit Command 0x%08X Receive Command 0x%08X Multicast Hash[%02d] 0x%08X VRRS (Vmxnet3 Revision Report and Selection) 0x%x UVRS (UPT Version Report and Selection) 0x%x DSA (Driver Shared Address) 0x%08x%08x CMD (Command Register) 0x%x MAC (Media Access Control address) %02x:%02x:%02x:%02x:%02x:%02x ICR (Interrupt Cause Register) 0x%x ECR (Event Cause Register) 0x%x IMR (Interrupt Mask Register) %d 0x%x TXPROD (Transmit Ring Producer Register) 0x%x Base Address 0x%08x%08x Size %u next2fill %u next2comp %u gen %u Buffer Size %u Transmit Completion Ring size %u next2proc %u stopped %u RXPROD1 (Receive Ring Producer Register) 1 0x%x RXPROD2 (Receive Ring Producer Register) 2 0x%x Receive Completion Ring 0x0000: OWNER_EPID (Owner EPID) 0x%08X 0x0004: MAX_EP (Maximum EP) 0x%08X 0x0010: DCTL (Device Control) 0x%08X 0x0020: CR (Command request) 0x%08X 0x0024: CS (Command status) 0x%08X 0x0028: SHSTSAL (Share status address Low) 0x%08X 0x002C: SHSTSAH (Share status address High) 0x%08X 0x0034: REQBL (Request Buffer length) 0x%08X 0x0038: REQBAL (Request Buffer Address Low) 0x%08X 0x003C: REQBAH (Request Buffer Address High) 0x%08X 0x0044: RESPBL (Response Buffer Length) 0x%08X 0x0048: RESPBAL (Response Buffer Address Low) 0x%08X 0x004C: RESPBAH (Response Buffer Address High) 0x%08X 0x0080: IS (Interrupt status) 0x%08X 0x0084: IMS (Interrupt mask set) 0x%08X 0x0088: IMC (Interrupt mask clear) 0x%08X 0x008C: IG (Interrupt generator) 0x%08X 0x0090: ICTL (Interrupt control) 0x%08X Device identifier1 = 0x%04X Device identifier2 = 0x%04X Auto-Neg Advertisement = 0x%04X Auto-Neg Link Partner Ability = 0x%04X Auto-Neg Expansion = 0x%04X Auto-Neg Next Page TX = 0x%04X Auto-Neg Link Partner Next Page RX = 0x%04X MMD Access Control = 0x%04X MMD Access Address/Data = 0x%04X 1000BASE-T Status Extension1 = 0x%04X 1000BASE-TX Status Extension = 0x%04X 1000BASE-T Status Extension2 = 0x%04X 100BASE-TX/1000BASE-T Rx Error Counter = 0x%04X 100BASE-TX/1000BASE-T FC Err Counter = 0x%04X 10BASE-T/100BASE-TX/1000BASE-T LD Counter = 0x%04X Extended 10BASE-T Control and Status = 0x%04X Extended PHY Control1 = 0x%04X Extended PHY Control2 = 0x%04X Auxiliary Control and Status = 0x%04X Extended Page Access = 0x%04X Length too short, expected at least 0x%x Length is too short, expected 0x%zx received unexpected message: len=%u type=%u cmd=%u Laser bias current high alarm (Chan %d) %-41s : %.2f degrees C / %.2f degrees F Error: op policy map not present Error: no policy index in what was expected to be ethtool header attribute Error: validation mask not reported for ethtool header flags malformed netlink message (bitset) malformed netlink message (pause modes) kernel device name too long: '%s' (GBIC not specified / not MOD_DEF compliant) (GBIC/SFP defined by 2-wire interface ID) (GBIC compliant with MOD_DEF %u) %-41s : 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x Transceiver type : %s 10G Ethernet: 10G Base-ER [SFF-8472 rev10.4 onwards] %s 10G Ethernet: 10G Base-LRM %s Infiniband: 1X Copper Active %s Infiniband: 1X Copper Passive %s ESCON: ESCON MMF, 1310nm LED %s ESCON: ESCON SMF, 1310nm Laser %s SONET: OC-192, short reach %s SONET: SONET reach specifier bit 1 %s SONET: SONET reach specifier bit 2 %s SONET: OC-48, intermediate reach %s SONET: OC-12, single mode, long reach %s SONET: OC-12, single mode, inter. reach %s SONET: OC-3, single mode, long reach %s SONET: OC-3, single mode, inter. reach %s FC: very long distance (V) %s FC: intermediate distance (I) %s FC: Shortwave laser, linear Rx (SA) %s FC: Electrical inter-enclosure (EL) %s FC: Electrical intra-enclosure (EL) %s FC: Shortwave laser w/o OFC (SN) %s FC: Shortwave laser with OFC (SL) %s FC: Multimode, 62.5um (M6) %s Extended: 100G AOC or 25GAUI C2M AOC with worst BER of 5x10^(-5) %s Extended: 100G Base-SR4 or 25GBase-SR %s Extended: 100G Base-LR4 or 25GBase-LR %s Extended: 100G Base-ER4 or 25GBase-ER %s Extended: 100G ACC or 25GAUI C2M ACC with worst BER of 5x10^(-5) %s Extended: 100G Base-CR4 or 25G Base-CR CA-L %s Extended: 25G Base-CR CA-S %s Extended: 25G Base-CR CA-N %s Extended: 10Gbase-T with SFI electrical interface %s Extended: 100G AOC or 25GAUI C2M AOC with worst BER of 10^(-12) %s Extended: 100G ACC or 25GAUI C2M ACC with worst BER of 10^(-12) %s Extended: 100GE-DWDM2 (DWDM transceiver using 2 wavelengths on a 1550 nm DWDM grid with a reach up to 80 km) %s Extended: 100G 1550nm WDM (4 wavelengths) %s Extended: 10Gbase-T Short Reach %s Extended: 4WDM-10 MSA (10km version of 100G CWDM4 with same RS(528,514) FEC in host system) %s Extended: 4WDM-20 MSA (20km version of 100GBASE-LR4 with RS(528,514) FEC in host system) %s Extended: 4WDM-40 MSA (40km reach with APD receiver and RS(528,514) FEC in host system) %s Extended: 100GBASE-DR (clause 140), CAUI-4 (no FEC) %s Extended: 100G-FR or 100GBASE-FR1 (clause 140), CAUI-4 (no FEC) %s Extended: 100G-LR or 100GBASE-LR1 (clause 140), CAUI-4 (no FEC) %s Extended: Active Copper Cable with 50GAUI, 100GAUI-2 or 200GAUI-4 C2M. Providing a worst BER of 10-6 or below %s Extended: Active Optical Cable with 50GAUI, 100GAUI-2 or 200GAUI-4 C2M. Providing a worst BER of 10-6 or below %s Extended: Active Copper Cable with 50GAUI, 100GAUI-2 or 200GAUI-4 C2M. Providing a worst BER of 2.6x10-4 for ACC, 10-5 for AUI, or below %s Extended: Active Optical Cable with 50GAUI, 100GAUI-2 or 200GAUI-4 C2M. Providing a worst BER of 2.6x10-4 for ACC, 10-5 for AUI, or below %s Extended: 50GBASE-CR, 100GBASE-CR2, or 200GBASE-CR4 %s Extended: 50GBASE-SR, 100GBASE-SR2, or 200GBASE-SR4 %s Extended: 50GBASE-FR or 200GBASE-DR4 %s Extended: 200G 1550 nm PSM4 (4/2/1G Rate_Select & AS0/AS1) (8/4/2G Independent Rx & Tx Rate_Select) Option : %s RX_LOS implemented, inverted %s Tunable transmitter technology %s Receiver decision threshold implemented %s Linear receiver output implemented %s Cooled transceiver implemented %s Retimer or CDR implemented Receiver signal average optical power Alarm/warning flags implemented Laser bias current high alarm (Chan 1) Extended identifier description : %s 1.5W max. Power consumption %s 2.0W max. Power consumption %s 2.5W max. Power consumption %s 3.5W max. Power consumption %s 4.0W max. Power consumption, %s 4.5W max. Power consumption, %s 5.0W max. Power consumption, High Power Class (> 3.5 W) enabled High Power Class (> 3.5 W) not enabled %-41s : 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x 0x%02x %s 40G Ethernet: 40G Base-CR4 %s 40G Ethernet: 40G Base-SR4 %s 40G Ethernet: 40G Base-LR4 %s 40G Ethernet: 40G Active Cable (XLPPI) %s 100G Ethernet: 100G AOC or 25GAUI C2M AOC with worst BER of 5x10^(-5) %s 100G Ethernet: 100G Base-SR4 or 25GBase-SR %s 100G Ethernet: 100G Base-LR4 %s 100G Ethernet: 100G Base-ER4 %s 100G Ethernet: 100G Base-SR10 %s 100G Ethernet: 100G CWDM4 MSA with FEC %s 100G Ethernet: 100G PSM4 Parallel SMF %s 100G Ethernet: 100G ACC or 25GAUI C2M ACC with worst BER of 5x10^(-5) %s 100G Ethernet: 100G CWDM4 MSA without FEC %s 100G Ethernet: 100G Base-CR4 or 25G Base-CR CA-L %s 25G Ethernet: 25G Base-CR CA-S %s 25G Ethernet: 25G Base-CR CA-N %s 40G Ethernet: 40G Base-ER4 %s 4x10G Ethernet: 10G Base-SR %s 40G Ethernet: 40G PSM4 Parallel SMF %s Ethernet: G959.1 profile P1I1-2D1 (10709 MBd, 2km, 1310nm SM) %s Ethernet: G959.1 profile P1S1-2D2 (10709 MBd, 40km, 1550nm SM) %s Ethernet: G959.1 profile P1L1-2D2 (10709 MBd, 80km, 1550nm SM) %s 10G Ethernet: 10G Base-T with SFI electrical interface %s 100G Ethernet: 100G AOC or 25GAUI C2M AOC with worst BER of 10^(-12) %s 100G Ethernet: 100G ACC or 25GAUI C2M ACC with worst BER of 10^(-12) %s 100GE-DWDM2 (DWDM transceiver using 2 wavelengths on a 1550 nm DWDM grid with a reach up to 80 km) %s 100G 1550nm WDM (4 wavelengths) %s 10GBASE-T Short Reach (30 meters) %s 4WDM-10 MSA (10km version of 100G CWDM4 with same RS(528,514) FEC in host system) %s 4WDM-20 MSA (20km version of 100GBASE-LR4 with RS(528,514) FEC in host system) %s 4WDM-40 MSA (40km reach with APD receiver and RS(528,514) FEC in host system) %s 100GBASE-DR (clause 140), CAUI-4 (no FEC) %s 100G-FR or 100GBASE-FR1 (clause 140), CAUI-4 (no FEC) %s 100G-LR or 100GBASE-LR1 (clause 140), CAUI-4 (no FEC) %s Active Copper Cable with 50GAUI, 100GAUI-2 or 200GAUI-4 C2M. Providing a worst BER of 10-6 or below %s Active Optical Cable with 50GAUI, 100GAUI-2 or 200GAUI-4 C2M. Providing a worst BER of 10-6 or below %s Active Copper Cable with 50GAUI, 100GAUI-2 or 200GAUI-4 C2M. Providing a worst BER of 2.6x10-4 for ACC, 10-5 for AUI, or below %s Active Optical Cable with 50GAUI, 100GAUI-2 or 200GAUI-4 C2M. Providing a worst BER of 2.6x10-4 for ACC, 10-5 for AUI, or below %s 50GBASE-CR, 100GBASE-CR2, or 200GBASE-CR4 %s 50GBASE-SR, 100GBASE-SR2, or 200GBASE-SR4 %s 50GBASE-FR or 200GBASE-DR4 Length (Copper or Active cable) (Copper cable passive equalized) (Copper cable, near and far end limiting active equalizers) (Copper cable, far end limiting active equalizers) (Copper cable, near end limiting active equalizers) (Copper cable, linear active equalizers) Revision Compliance : %s SFF-8436 Rev 4.8 or earlier %s SFF-8636 Rev 1.3 or earlier %s near and far end limiting active equalizers) %s far end limiting active equalizers) %s near end limiting active equalizers) (No fault detected / not supported) ethtool: message too short (%u bytes) invalid SecureOn password length %u (should be %u) Current message level: 0x%08x (%u) malformed netlink message (link_modes) Supports auto-negotiation: %s Advertised auto-negotiation: %s Link partner advertised link modes: Link partner advertised pause frame use: Link partner advertised auto-negotiation: %s Link partner advertised FEC modes: NL_POLICY_TYPE_ATTR_MIN_VALUE_S NL_POLICY_TYPE_ATTR_MAX_VALUE_S NL_POLICY_TYPE_ATTR_MIN_VALUE_U NL_POLICY_TYPE_ATTR_MAX_VALUE_U NL_POLICY_TYPE_ATTR_MIN_LENGTH NL_POLICY_TYPE_ATTR_MAX_LENGTH NL_POLICY_TYPE_ATTR_POLICY_IDX NL_POLICY_TYPE_ATTR_POLICY_MAXTYPE NL_POLICY_TYPE_ATTR_BITFIELD32_MASK ETHTOOL_A_TUNNEL_UDP_ENTRY_UNSPEC ETHTOOL_A_TUNNEL_UDP_ENTRY_PORT ETHTOOL_A_TUNNEL_UDP_ENTRY_TYPE ETHTOOL_A_CABLE_AMPLITUDE_UNSPEC ETHTOOL_A_CABLE_AMPLITUDE_PAIR ETHTOOL_A_CABLE_STEP_FIRST_DISTANCE ETHTOOL_A_CABLE_STEP_LAST_DISTANCE ETHTOOL_A_CABLE_STEP_STEP_DISTANCE ETHTOOL_A_CABLE_FAULT_LENGTH_UNSPEC ETHTOOL_A_CABLE_FAULT_LENGTH_PAIR ETHTOOL_A_CABLE_FAULT_LENGTH_CM ETHTOOL_A_STATS_GRP_HIST_BKT_LOW ETHTOOL_A_STATS_GRP_HIST_BKT_HI ETHTOOL_A_TUNNEL_UDP_TABLE_UNSPEC ETHTOOL_A_TUNNEL_UDP_TABLE_SIZE ETHTOOL_A_TUNNEL_UDP_TABLE_TYPES ETHTOOL_A_TUNNEL_UDP_TABLE_ENTRY ETHTOOL_A_CABLE_TDR_NEST_UNSPEC ETHTOOL_A_CABLE_TDR_NEST_AMPLITUDE ETHTOOL_A_CABLE_TDR_NEST_PULSE ETHTOOL_A_CABLE_NEST_FAULT_LENGTH ETHTOOL_A_MM_STAT_REASSEMBLY_ERRORS ETHTOOL_A_MM_STAT_REASSEMBLY_OK ETHTOOL_A_MM_STAT_RX_FRAG_COUNT ETHTOOL_A_MM_STAT_TX_FRAG_COUNT ETHTOOL_PODL_PSE_PW_D_STATUS_UNKNOWN ETHTOOL_PODL_PSE_PW_D_STATUS_DISABLED ETHTOOL_PODL_PSE_PW_D_STATUS_SEARCHING ETHTOOL_PODL_PSE_PW_D_STATUS_DELIVERING ETHTOOL_PODL_PSE_PW_D_STATUS_SLEEP ETHTOOL_PODL_PSE_PW_D_STATUS_IDLE ETHTOOL_PODL_PSE_PW_D_STATUS_ERROR ETHTOOL_PODL_PSE_ADMIN_STATE_UNKNOWN ETHTOOL_PODL_PSE_ADMIN_STATE_DISABLED ETHTOOL_PODL_PSE_ADMIN_STATE_ENABLED ETHTOOL_A_CABLE_TEST_TDR_CFG_UNSPEC ETHTOOL_A_CABLE_TEST_TDR_CFG_FIRST ETHTOOL_A_CABLE_TEST_TDR_CFG_LAST ETHTOOL_A_CABLE_TEST_TDR_CFG_STEP ETHTOOL_A_CABLE_TEST_TDR_CFG_PAIR ETHTOOL_A_PAUSE_STAT_TX_FRAMES ETHTOOL_A_PAUSE_STAT_RX_FRAMES ETHTOOL_TCP_DATA_SPLIT_UNKNOWN ETHTOOL_TCP_DATA_SPLIT_DISABLED ETHTOOL_TCP_DATA_SPLIT_ENABLED ETHTOOL_A_STRINGSETS_STRINGSET ETHTOOL_A_CABLE_TEST_TDR_UNSPEC ETHTOOL_A_CABLE_TEST_TDR_NTF_HEADER ETHTOOL_A_CABLE_TEST_TDR_NTF_STATUS ETHTOOL_A_CABLE_TEST_TDR_NTF_NEST ETHTOOL_A_CABLE_TEST_NTF_UNSPEC ETHTOOL_A_CABLE_TEST_NTF_HEADER ETHTOOL_A_CABLE_TEST_NTF_STATUS ETHTOOL_A_PODL_PSE_ADMIN_STATE ETHTOOL_A_PODL_PSE_ADMIN_CONTROL ETHTOOL_A_PODL_PSE_PW_D_STATUS ETHTOOL_A_MODULE_POWER_MODE_POLICY ETHTOOL_A_MODULE_EEPROM_UNSPEC ETHTOOL_A_MODULE_EEPROM_HEADER ETHTOOL_A_MODULE_EEPROM_OFFSET ETHTOOL_A_MODULE_EEPROM_LENGTH ETHTOOL_A_MODULE_EEPROM_I2C_ADDRESS ETHTOOL_A_TUNNEL_INFO_UDP_PORTS ETHTOOL_A_CABLE_TEST_TDR_HEADER ETHTOOL_A_COALESCE_RX_MAX_FRAMES ETHTOOL_A_COALESCE_RX_USECS_IRQ ETHTOOL_A_COALESCE_RX_MAX_FRAMES_IRQ ETHTOOL_A_COALESCE_TX_MAX_FRAMES ETHTOOL_A_COALESCE_TX_USECS_IRQ ETHTOOL_A_COALESCE_TX_MAX_FRAMES_IRQ ETHTOOL_A_COALESCE_STATS_BLOCK_USECS ETHTOOL_A_COALESCE_USE_ADAPTIVE_RX ETHTOOL_A_COALESCE_USE_ADAPTIVE_TX ETHTOOL_A_COALESCE_PKT_RATE_LOW ETHTOOL_A_COALESCE_RX_USECS_LOW ETHTOOL_A_COALESCE_RX_MAX_FRAMES_LOW ETHTOOL_A_COALESCE_TX_USECS_LOW ETHTOOL_A_COALESCE_TX_MAX_FRAMES_LOW ETHTOOL_A_COALESCE_PKT_RATE_HIGH ETHTOOL_A_COALESCE_RX_USECS_HIGH ETHTOOL_A_COALESCE_RX_MAX_FRAMES_HIGH ETHTOOL_A_COALESCE_TX_USECS_HIGH ETHTOOL_A_COALESCE_TX_MAX_FRAMES_HIGH ETHTOOL_A_COALESCE_RATE_SAMPLE_INTERVAL ETHTOOL_A_COALESCE_USE_CQE_MODE_TX ETHTOOL_A_COALESCE_USE_CQE_MODE_RX ETHTOOL_A_COALESCE_TX_AGGR_MAX_BYTES ETHTOOL_A_COALESCE_TX_AGGR_MAX_FRAMES ETHTOOL_A_COALESCE_TX_AGGR_TIME_USECS ETHTOOL_A_CHANNELS_COMBINED_MAX ETHTOOL_A_CHANNELS_OTHER_COUNT ETHTOOL_A_CHANNELS_COMBINED_COUNT ETHTOOL_A_RINGS_TCP_DATA_SPLIT ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN ETHTOOL_A_RINGS_TX_PUSH_BUF_LEN_MAX ETHTOOL_A_LINKSTATE_EXT_SUBSTATE ETHTOOL_A_LINKMODES_MASTER_SLAVE_CFG ETHTOOL_A_LINKMODES_MASTER_SLAVE_STATE ETHTOOL_A_LINKMODES_RATE_MATCHING ETHTOOL_A_LINKINFO_TP_MDIX_CTRL ETHTOOL_A_LINKINFO_TRANSCEIVER ncsi_mac_rx_pkts_65to127octets ncsi_mac_rx_pkts_128to255octets ncsi_mac_rx_pkts_256to511octets ncsi_mac_rx_pkts_512to1023octets ncsi_mac_rx_pkts_1024to1518octets ncsi_mac_rx_pkts_1519tomaxoctets ncsi_mac_tx_pkts_65to127octets ncsi_mac_tx_pkts_128to255octets ncsi_mac_tx_pkts_256to511octets ncsi_mac_tx_pkts_512to1023octets ncsi_mac_tx_pkts_1024to1518octets ncsi_mac_tx_pkts_1519tomaxoctets TX_FILTER_ALL_VLAN_ETHERTYPES_BIT TX_TCPIP_FILTER_FULL_SEARCH_RANGE TX_TCPIP_FILTER_WILD_SEARCH_RANGE TX_UDPIP_FILTER_FULL_SEARCH_RANGE TX_UDPIP_FILTER_WILD_SEARCH_RANGE TX_ETH_FILTER_FULL_SEARCH_RANGE TX_ETH_FILTER_WILD_SEARCH_RANGE ETHERNET_WILDCARD_SEARCH_LIMIT CMIS module is not in ModuleReady state Large number of physical errors PCS did not acquire block lock KR Link partner did not set receiver ready No partner detected during force mode ETHTOOL_MSG_LINKINFO_GET_REPLY ETHTOOL_MSG_LINKMODES_GET_REPLY ETHTOOL_MSG_LINKSTATE_GET_REPLY ETHTOOL_MSG_FEATURES_GET_REPLY ETHTOOL_MSG_FEATURES_SET_REPLY ETHTOOL_MSG_PRIVFLAGS_GET_REPLY ETHTOOL_MSG_CHANNELS_GET_REPLY ETHTOOL_MSG_COALESCE_GET_REPLY ETHTOOL_MSG_CABLE_TEST_TDR_NTF ETHTOOL_MSG_TUNNEL_INFO_GET_REPLY ETHTOOL_MSG_MODULE_EEPROM_GET_REPLY ETHTOOL_MSG_PHC_VCLOCKS_GET_REPLY ETHTOOL_MSG_PLCA_GET_CFG_REPLY ETHTOOL_MSG_PLCA_GET_STATUS_REPLY ETHTOOL_MSG_CABLE_TEST_TDR_ACT Module temperature high warning Module temperature low warning Laser bias current low alarm (Chan %d) Laser bias current high warning (Chan %d) Laser bias current low warning (Chan %d) Laser tx power high alarm (Channel %d) Laser tx power low alarm (Channel %d) Laser tx power high warning (Channel %d) Laser tx power low warning (Channel %d) Laser rx power high alarm (Channel %d) Laser rx power low alarm (Channel %d) Laser rx power high warning (Channel %d) Laser rx power low warning (Channel %d) Laser bias current low alarm (Chan 1) Laser bias current high warning (Chan 1) Laser bias current low warning (Chan 1) Laser bias current high alarm (Chan 2) Laser bias current low alarm (Chan 2) Laser bias current high warning (Chan 2) Laser bias current low warning (Chan 2) Laser bias current high alarm (Chan 3) Laser bias current low alarm (Chan 3) Laser bias current high warning (Chan 3) Laser bias current low warning (Chan 3) Laser bias current high alarm (Chan 4) Laser bias current low alarm (Chan 4) Laser bias current high warning (Chan 4) Laser bias current low warning (Chan 4) Laser tx power high alarm (Channel 1) Laser tx power low alarm (Channel 1) Laser tx power high warning (Channel 1) Laser tx power low warning (Channel 1) Laser tx power high alarm (Channel 2) Laser tx power low alarm (Channel 2) Laser tx power high warning (Channel 2) Laser tx power low warning (Channel 2) Laser tx power high alarm (Channel 3) Laser tx power low alarm (Channel 3) Laser tx power high warning (Channel 3) Laser tx power low warning (Channel 3) Laser tx power high alarm (Channel 4) Laser tx power low alarm (Channel 4) Laser tx power high warning (Channel 4) Laser tx power low warning (Channel 4) Laser rx power high alarm (Channel 1) Laser rx power low alarm (Channel 1) Laser rx power high warning (Channel 1) Laser rx power low warning (Channel 1) Laser rx power high alarm (Channel 2) Laser rx power low alarm (Channel 2) Laser rx power high warning (Channel 2) Laser rx power low warning (Channel 2) Laser rx power high alarm (Channel 3) Laser rx power low alarm (Channel 3) Laser rx power high warning (Channel 3) Laser rx power low warning (Channel 3) Laser rx power high alarm (Channel 4) Laser rx power low alarm (Channel 4) Laser rx power high warning (Channel 4) Laser rx power low warning (Channel 4) Laser bias current high warning Laser bias current low warning Laser output power high warning Laser output power low warning ethtool (%s): invalid value '%s' for parameter '%s' ethtool (%s): too few arguments for parameter '%s' (expected %u) ethtool (%s): invalid value '%s' of parameter '%s' ethtool (%s): internal error parsing '%s' ethtool (%s): flag '%s' for parameter '%s' is not followed by 'on' or 'off' ethtool (%s): invalid char '%c' in '%s' for parameter '%s' ethtool: unexpected parameter '%s' warning: unexpected reply message type %u warning: unexpected message for device %s malformed diff info from kernel malformed netlink message (statistic) internal error - malformed label Malformed response from kernel Link partner advertised EEE link modes: Hardware Transmit Timestamp Modes invalid kernel response - bad statistic entry ethtool (%s): unknown parameter '%s' ethtool (%s): duplicate parameter '%s' ethtool (%s): no value for parameter '%s' ethtool (%s): parameter '%s' requires %u words ethtool (--set-eee): parameters missing ethtool (--set-fec): parameters missing ethtool: bad_attr inside an attribute (offset %d) deprecated parameter '%s' not supported by kernel MAC Merge layer state for %s: PoDL PSE Power Detection Status: %s podl-pse-power-detection-status Cable test started for device %s. Cable test completed for device %s. Cable test TDR started for device %s. Cable test TDR completed for device %s. malformed netlink message (udp table) malformed netlink message (table size) Types: none (static entries) malformed netlink message (types) malformed netlink message (udp entry) malformed netlink message (port) malformed netlink message (tunnel type) (no module present, unknown, or unspecified) (module soldered to motherboard) (Shielded Mini Multilane HD 4X) (Shielded Mini Multilane HD 8X) (Shielded Mini Multilane HD 4X Fanout Cable) (Shielded Mini Multilane HD 8X Fanout Cable) (QSFP-DD Double Density 8X Pluggable Transceiver (INF-8628)) (OSFP 8X Pluggable Transceiver) (DSFP Dual Small Form Factor Pluggable Transceiver) (QSFP+ or later with Common Management Interface Specification (CMIS)) (SFP-DD Double Density 2X Pluggable Transceiver with Common Management Interface Specification (CMIS)) (SFP+ and later with Common Management Interface Specification (CMIS)) invalid kernel response - malformed histogram entry invalid kernel response - histogram entry missing attributes invalid kernel response - bad histogram entry bounds Hex and raw dump cannot be specified together ethtool (--set-module): parameters missing ethtool (--set-plca-cfg): parameters missing ethtool (--set-pse): parameters missing Laser bias current high alarm threshold Laser bias current low alarm threshold Laser bias current high warning threshold Laser bias current low warning threshold Laser output power high alarm threshold Laser output power low alarm threshold Laser output power high warning threshold Laser output power low warning threshold Module temperature high alarm threshold Module temperature low alarm threshold Module temperature high warning threshold Module temperature low warning threshold Module voltage high alarm threshold Module voltage low alarm threshold Module voltage high warning threshold Module voltage low warning threshold Laser rx power high alarm threshold Laser rx power low alarm threshold Laser rx power high warning threshold Laser rx power low warning threshold RX flow hash indirection table for %s with %llu RX ring(s): Autonegotiate: %s RX: %s TX: %s RX negotiated: %s TX negotiated: %s S9S9S9SSRRRSTTaUaUUVSSSmVfTqfTqTqTqTqTqTq fDfTqTqTq4f$f fTqe~`rq=ts>srw wvZvvgutax8|{p{{zaxaxizyy`yxx7 ˄̖lL̖, jegg_ZgggggUggPggKgJ/ 1 2 3 J ! " # $ % & ' ( ) * + , - . / 0 4 5 6 7 8 9 : ; < = > ? @ A B C D E F G H I K L M N O P Q R S T U V W X Y Z [ \ ] ^ _ ` a b c d e K K p?? @@ @ @@ @@ $@ >@?{Gzt? ? N N N O O O `@ hP hP8 ` @````` @`````HX hP8 pp` H 0 pppphxH @ p X @ ( p ` P @ 0 =(=H=8h=8888==8=:l:L::,::9<x<X<=8<<;: H ` jsonw_destroy jsonw_end -ŐߐeΕ+C[sĖ\66666zzzzzzzzzzzzzzzzzzz'''z''zzzzzz'zzj hP8 x`ppppppppppppppppppH0 |\lЄ D$$ĦdԥԩAdͰ'Jԩmԩԩ֬ =`ɪ2Ux?b˭ԩԩԩԩԩԩԩԩ4Wԩԩԩԩԩԩԩԩԩԩԩԩz)Lԩԩԩԩԩԩԩԩԩoد |\< ܸ|dL4 T̶TlT$<$$$$ d d ' ' ' ' N N @ @ @ @ a a a P P P ' ' ' ' ' P P P P P @ @ @ @ @ d @ @ @ @ @ d d 5 5 5 5 5 5 P(ȝXpp : ` @P`px`H0 pX@(888hP@dBh ;d k p `t X B gH H $$ :h P f w8 L ! , p 6P M r < R\ c z h ( k < mH# 1 : ; @ X @ p8 0\ ` $ L p | D p P ( Px P&h - / P20 @3T 4 @5 09 ;0 P<` `= p> E 0F4 F` G| @H PI PJ@ PK L L @MP O 0Q PQ pQ ml 0t u wL px z }( 0~l P\ Ї 4 x D ` @ Щ pH @t p p < Pp P 4 H p P ( | ,! 3D! <! H! c! Pg " gH" ht" i" j" Pk" @l# ld# m# m# n# o$ po8$ 0px$ pv$ $ % 0% PX% @|% % % % & L& |& `& `& ' P4' \' |' p' @ ' ( `4( 0 h( |( ( ( ph) ) @* @0* ``* * * !* #(+ $T+ ++ @2+ 9+ <, B8, Dh, G, G, H, H- R@- `Sh- 0V- pV- `Y- [$. \T. @_. d. pe. / D/ t/ / / P0 ,0 X0 P0 0 0 1 <1 l1 1 1 p 2 82 `2 2 2 2 3 D3 t3 3 3 3 P(4 P4 x4 @4 4 4 5 P5 (5 P5 5 05 5 6 @<6 l6 6 6 @6 ,7 d7 p7 p7 7 8 ` X8 8 8 p8 9 L9 P|9 9 9 : !8: P8d: A: G: H; pID; 0Jt; PN; O; p\< `@< cp< j< j< 0n = po0= Pq\= w= p{= `= > L> x> 0> > p> (? @d? ? М? ? P<@ d@ @ p@ p@ A DA A A pA ` B <B PB |B B B B C @XC PC C 0 D pD p$E PE E `E E P F LF F F pF F G `PG G `G G H @LH xH H 0H I <I hI I P I PI zR x & D $ 4 FJ w ?9*3$" \ t r / , E^ H 0 AT BH $ * AC Au F 0 f AC DEE B u 4 T AC DK H h E 0 AM E@ E O $ * AJ BG , } AC BDo G T D , AC C , P AC BGLD J , AC BHED D , AO M A , d AC BJd D F $ 0 EC G X ( ( x l AC FED , \ EN DSJ F , , EN DSJ> F D f, , d 0 EN BUJF F B% , d EN DSJ F , , ? EC M A 4 ( T ER DJW D \J ( AM DH C ! AP A , ! AC HHI C ( D#i AC HHp D , L # EN OH E | = , ('c ET BIIJ+ , h) AC BIIID , ) AC HD A , , * AC DLMD A , \ + AL DJH E $ 2' AN J B ( 2 AC BF A x32 E^ 3 EC A < 8 $ T 4 EC I E | . $ L5 EC G A $ 6 EC G A $ 6 EH C A H , d 07 EC I| C q A f 7g EC T A 7 , 7P EC Mz A V 0 < 9 AC M B { A p < 4; @; , L;@ EC P3 E , <W{ EC I D 8 }c $ X l]C EC L J ( x^V EC I F m6 ` EC El A _ , $ `. EC M B T -1 , t b EC M. E $ Pe EC I A , e EH BX9 H 8 % , X h EJ QIKj A ~C , |i EC M A q $ kx EC G C <2 , < (n EC Mi A l " $ p EJ G J B $ Ds EG G A , t EC MC A D , d Pu EH HR A zK ( EC Mu A t EC E` C U , EG P1 A L $ $ l h EC Cu A , Ѝ EC P F b ( EC FJI , Ğ% EN MJh A @ p ( ` 0 EN MK? F D ( EN L J o , p E\ DII A , $ F EG HH F 0 T EH BM L S E , EC MG A jD 0 \ EC HKq D ^ , شN EG HKI H < * , \ ط AC BIIEH L @ X> EG I| O I ^ J B N T_ D EG KD E % K N I D , EG KD E F J J l L L t TL HH KH S A A P V PC DHDq D _ I @ C 0 ,7 EO BIIIM G 0 L 8 AQ BHy K T L Y , EH DL A , J EC Mj A H VG HH+ H P F , , ( OO BIM C 0 \ & O^ BIKH A$ A} EO BJ\ ( ,E AC DKf A ( E EC M A dF Ei ( 0 4G EC Gw A , \ G EC BHD J h $ XH EC BD E , I QO CM H IBA dI EC E^ E $ Ij EC EJ I ( H <J QI Ey H ] ( t Jo EC Ei J Q O 0 Jj EC BHh F I G P < 0K EC BD@ J I G X P G I 0 K2 EJ BIIID D , H Q EG FID A x c AM A , d AC F[[ E $ gf AM DHG g AM A hZ AC AG ( < iT AE BG O _ $ h ,k AH BI G $ k EX E` , \lv OO FH> F , o( EC M A , |U( EO I E ( H Al BTQL , t 9 EC M+ H ( EO BKI $ k EO BIK \N Y] J H , ] AC BD H U K ( H AC FIK ( t ` AE BGH I _ , EJ I` H 0 $ EJ I D Y , $ @ 4 AO AK L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L L ` AH BKE E K E K E K E K E K E Q O Q O Q E K 8 h OC FEDn A Z $ 0 AE BK H , AE BILH I , ? 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